Jazz Semiconductor and Mentor Graphics Release Comprehensive Design Kits for Analog/Mixed-Signal Integrated Circuit Design Flow
September 5, 2006 -- Jazz Semiconductor and Mentor Graphics Corp. today announced the availability of a series of technology design kits (TDKs) that support Jazz's silicon germanium (SiGe) and CMOS process technologies. The first set of TDKs that are immediately available support Jazz's 0.35-micron SiGe BiCMOS process (SBC35), its 0.18-micron SiGe BiCMOS process (SBC18), and its 0.18-micron CMOS process (CA18HR). These production-ready and highly flexible TDKs enable IC design companies to rapidly set up their design environments using the Mentor Graphics' complete Analog/Mixed-Signal (AMS) System-on-Chip (SoC) design flow.
The comprehensive design kits include Jazz-supported Eldo simulation models, Calibre DRC, Calibre LVS and Calibre xRC technology files, schematic symbols for Design Architect-IC, programmable device generators to enable schematic-driven layout with IC Station, process definition files, and all other configuration files necessary to effectively utilize Mentor's AMS design flow.
"As our customer base of IC design companies developing high-frequency wireless and high-speed networking products expands, we're witnessing increasing demand for process technologies optimized for these applications," said Jue-Hsien Chern, Vice President and General Manager, Deep Submicron (DSM) division, Mentor Graphics. "Jazz Semiconductor's SiGe and CMOS processes are ideal for innovative, ultra high-performance applications and we're proud to be collaborating on design kits supporting our integrated mixed-signal design flow."
A choice of processes
The SBC35 process is a mature, low-power, cost-effective solution for both networking and wireless applications, while the SBC18 process is the solution for ultra low power and higher speed integrated networking and wireless products. With the SBC35 TDK, process designers have the flexibility of using any combination of three SiGe bipolar (NPN) transistors, each of which provides a different optimization for power and speed in a 0.35-micron platform that also includes CMOS, deep trench isolation, lateral PNP transistors, MIM and MIS capacitors, high-performance varactors, poly and N-well resistors, and high-Q inductors. The SBC18 TDK comes standard with two SiGe bipolar (NPN) transistor types in a 0.18-micron platform that also includes CMOS, lateral and vertical PNP transistors, MIM capacitors, varactors, poly and nwell resistors, and high-Q inductors.
CA18HR is an advanced 0.18-micron radio frequency CMOS process; it leverages a mixed-signal CMOS technology and robust RF modeling capability. This enables integration of RF circuit blocks with multi-million gate CMOS logic functions to create system-on-a-chip solutions. This process comes with 1.8 and 3.3-V CMOS, lateral and vertical PNP, MIM capacitors, varactors, poly and nwell resistors, high-Q inductors, six layers of metal, using a thick top metal.
Mentor Graphics technology design kits
The Mentor TDKs include advanced inductor layouts and model generation capabilities, which integrate Jazz's state-of-the-art inductor modeling capabilities with Mentor's IC Station-based parameterized device layout generators. This enables users to quickly create and model complex correct-by-construction inductors in real time. The kits come with a feature-rich user interface linked directly to Jazz's proprietary inductor model library.
"This complete TDK for the Mentor IC flow, specifically the programmable device generators and associated Eldo models, will enable designers to leverage the full flexibility of our SiGe and RF CMOS processes," said Marco Racanelli, Vice President of Technology and Engineering at Jazz Semiconductor. "Our partnership with Mentor Graphics will provide value to our mutual customers who are on the cutting edge of high-performance, mixed-signal and RF designs."
SBC35, SBC18 and CA18HR design kits are currently available to Jazz Semiconductor and Mentor Graphics customers, and can be requested directly from either company.
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.