Perfectus Announces Availability of SystemVerilog-Based OVM-Compliant PCI Express 3.0 Verification IP
January 5, 2010 -- Perfectus Technology, Inc. today announced availability of SystemVerilog-based and Open Verification Methodology (OVM)-compliant PCI Express Gen3 verification IP (Genie-PCIe3 VIP) to help designers accelerate the verification of PCI Express Gen3-based products.
Genie-PCIe3 features a complete set of intelligent verification components for verifying PCI Express 1.1/ 2.0/ 3.0 and SR-IOV-based designs and it works in any verification environment, including SystemVerilog and OVM methodology. The Root complex and End Point Models, Comprehensive Test Suite for unit-level and system-level testing and Interface Inspector help in ensuring robust verification, maximum functional coverage, complete protocol compliance and error testing. The VIP has a rich set of constrainable parameters, sequence library, error injection capabilities, APIs and callbacks for user configurability. The VIP is configurable and extensible to satisfy each specific verification environment's requirements.
Genie-PCIe3 is fully compliant to the PCI Express Gen3 with features that Perfectus says are superior to any other solution available in the market. The Test Suite, along with Interface Inspector, provides developers the ability to comprehensively test PCI Express Gen3 Root Complex, Endpoint, Switch, SR-IOV Endpoint, and PHY designs against the vast requirements set forth by the PCIe Gen3 specification.
The important feature of this product is the statistical reports generated by the Genie-Interface-Inspector. Reports include a functional-coverage report which helps to identify what functionality has been tested; an Error Inspection report which specifies the errors that were tested and errors that were not tested; a Protocol Inspection report which shows the percentage of PCIe 3.0 specification compliance; and a Features Coverage report which shows the percentage of features covered.
"We are pleased that Perfectus has made available the first OVM-tested PCIe 3.0 verification IP validated to run on the Questa verification platform," said Dennis Brophy, Director of Strategic Business Development, Mentor Graphics Corporation. "As an active member of the Mentor Questa Vanguard Partnership program, Perfectus works with us to improve design and verification productivity."
PCIe Gen3 VIP is available immediately.
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.