Hardware/Software Integration: Closing the Gap
Publication: EE Times EDA Designline
March 13, 2011 -- In recent years, system integration associated with system-on-chip (SOC) design has grown at a rapid rate and continues to drive the semiconductor design market. Although this growth has been beneficial for the design community, the sophisticated and complex manufacturing requirements of next-generation devices have increased the cost of ASIC and ASSP development.
Product implementation of complex, low-power designs requires early integration of various hardware features with corresponding firmware onto one silicon device. The reduced life-span of current products have condensed SOC development cycles and have made the SOC verification and in-system validation process an arduous task. The bulk of time spent during the product development cycle of SOCs is often in hardware/ software integration and has brought in-system validation to the forefront of this extensive process.
By Tom Huang and Pete Mar. (Huang is CTO/ founder, InPA Systems, Inc. and Mar is a Senior Field Applications Engineer at InPA Systems.)
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.