Arteris Supporting Deployment of ARM's AMBA 4 ACE Specification
June 7, 2011 -- Arteris SA today announced its support for AMBA 4 ACE, the second phase of the 4 specification. Arteris has contributed to the deployment of new AMBA 4 technologies, such as virtual memory and memory barriers.
"Arteris has been an active participant in the AMBA 4 specification process. We are partnering with them to ensure the swift deployment of critical new computer science techniques introduced with AMBA 4 ACE, such as memory barriers and distributed virtual memory," said Michael Dimelow, Director of Marketing, Processor Division, ARM. "This will provide developers with a solution to help design high-performance heterogeneous multicore SOCs by utilizing a combination of the ARM CoreLink CCI-400 cache coherent interconnect and the Arteris FlexNoC interconnect."
"Arteris has benefited from its interconnect ecosystem partnership with ARM to deliver high quality interoperability to ARM IP in timely manner," said Charlie Janac, Arteris President and CEO. "We have achieved our goal of offering an interconnect solution that accelerates adoption of the latest ARM processor cores like the ARM Cortex-A15 MPCore together with the Arteris FlexNoC interconnect and interchip link products."
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.