Meeting Aggressive Power Budgets with Xilinx 7 Series FPGAs
Sponsor: Xilinx, Inc.
September 13, 2011 -- Judicious component selection and techniques for power optimization are becoming critical to successful, high-performance, power-efficient system designs. Through a versatile 28-nm High-Performance Low-Power (HPL) process and a unified and scalable architecture, Xilinx is able to deliver a full range of power-efficient FPGA product families for today's demanding applications.
In this webcast, we explain the process choices, device architecture and circuit techniques Xilinx has employed to accomplish these goals. We review several in-depth case study examples to illustrate how Xilinx tools, design techniques, product features, and new device options can enable engineers to apply these power and performance advantages to their unique FPGA-based designs.
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.