IPL Alliance Announces IPL 2.0 and Appoints New Chair for Constraint Working Group
June 4, 2012 -- The IPL Alliance today announced IPL 2.0, an updated release of the first open standard for interoperable process design kits (iPDKs). The IPL 2.0 reference kit includes an iPDK developer's guide, a sample 40-nm) reference iPDK, a reference design and a user guide. It is ready now for validation by IPL Alliance members.
The IPL Alliance released IPL 1.0 in 2010. IPL 2.0 uses the same specification of the standard and adds a new 40-nm reference iPDK in addition to the 90-nm reference iPDK in IPL 1.0. The iPDK standard is based on the OpenAccess database and uses standard languages and a unified architecture to enable interoperability among all EDA vendor tools. Engineering teams only need to develop a single PDK for each process node, which reduces development costs, shortens design cycles and provides designers with earlier access to advanced process technologies across multiple tools. IPL Alliance members are validating IPL 2.0 now, and it is targeted for public download by end of year 2012.
The IPL Constraint Working Group includes members from Altera, Ciranova, Mentor Graphics, Pulsic, SpringSoft, Synopsys and TSMC. In addition, Xilinx and STMicroelectronics are acting in an advisory role. The working group has delivered the IPL Constraints 1.1 in 2011 and now is planning for its next phase by soliciting donations of additional constraint types for the next version of the standard to meet emerging design challenges. Ed Petrus, the newly appointed chair, has more than 25 years of experience in the EDA industry. Prior to joining Mentor Graphics, Petrus was the co-founder of Ciranova, a board member company of the IPL Alliance. He is also the vice-chair of Si2's OPDK initiative.
Reprinted from SOCcentral.com, your first stop for ASIC, FPGA, EDA, and IP news and design information.