April 16, 2007 -- KLA-Tencor Corp. and Clear Shape Technologies, Inc. are collaborating on DFM (design for manufacturability) solutions enabling "design-aware" photomask inspection at 45nm and below. The collaboration involves using KLA-Tencor's new Terascan HR photomask inspection system and Clear Shape's Variability Platform products, InShapeT and OutPerformT. The two companies expect this collaboration to enable designers to achieve improved device yield and, ultimately, faster production ramp for the most advanced designs.
Clear Shape's patented modeling techniques utilize design tolerances from transistor timing analysis to identify areas on the mask that are critical to device performance. With its sensitivity and inspection capability, the TeraScanHR system can use this information to optimize and enhance mask inspection parameters on specific yield-critical photomask features, resulting in a more efficient inspection flow that has the potential to streamline the overall mask manufacturing process. This capability gives a mask shop's customers the flexibility to use tighter inspection specifications in just the critical areas on the mask which affect device performance, without significantly impacting overall mask yield or productivity. The technology is also extendible to various types of wafer inspection, metrology and defect review applications.
"Having the ability to utilize critical design intent models in our photomask inspection system should allow our users to more quickly ramp production, with the potential to then increase yield ramp cycle time in 45nm and below manufacturing," said Harold Lehon, Vice President and General Manager of KLA-Tencor's Reticle and Photomask Inspection Division. "Clear Shape's electrical DFM solution, which is based on fast and accurate silicon contour prediction models, provides additional enabling capabilities for our latest generation of photomask inspection systems."
At 45nm and below, chipmakers risk an increase in systematic yield loss resulting from defects without obvious pattern transfer errors but which cause device electrical performance and/or functional problems. By understanding a photomask defect's effect on final silicon electrical performance, a higher correlation can be established between the defect and final wafer yield, significantly improving yield predictability. Clear Shape's electrical DFM technology enables a strong "electrical design intent" relationship between design, mask manufacturing and wafer processing, so that parametric transistor gate and interconnect yield can potentially be better controlled in the design flow.
Go to the Clear Shape Technologies, Inc. website for details.
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