September 17, 2007 -- Startup Align Engineering LLC came out of stealth mode today, announcing a technology breakthrough that is the basis for fast, simple chip-to-chip communication without multiple I/O lines and intensive engineering. The patented technology, called Align Lock Loop (ALL), provides for a cost-effective alternative to today's complex SerDes I/O designs.

ALL technology enables each LVDS pair to morph into a complete SerDes solution in a single clock domain, eliminating the need for multiple expensive clock data recovery devices (CDRs) and associated phase lock loops (PLLs). ALL gives designers the ability to achieve simple high-speed connectivity for such applications as wireless infrastructure, medical imaging, military and defense.

"With ALL, boards in racks will give way to clusters of boards with digital communication, cabling to analog data sources, saving substantial cost and providing higher performance," said Jerry Hinson, Engineering Specialist at Applied Signal Technology.