November 23, 2009 -- Arasan Chip Systems, Inc. announced today the increased adoption of its redesigned USB 2.0 Hub Controller IP core which enables designers to build compound devices that integrate multiple functions. These compound devices connect to an external USB host over a single USB upstream port.
Arasan's low-power USB 2.0 Hub controller IP can seamlessly integrate multiple downstream functions without the need for a USB PHY (for each downstream function), thereby reducing power and system cost. The IP can be scaled to support multiple functions of differing speed to an upstream high-speed USB host with minimal internal buffering.
Arasan's USB 2.0 Hub Controller IP core integrates all the functions needed to build an integrated low-power USB Hub. The IP core integrates control endpoint, interrupt endpoint, repeater, transaction translator, routing logic and downstream port logic. It handles all standard USB transfers such as isochronous, interrupt, control and bulk. The controller connects to a standard USB 2.0 PHY over a UTMI, UTMI+ or ULPI interface. The modular implementation of the USB 2.0 Hub IP facilitates the development of low-power compound devices that include the USB 2.0 hub functionality.
