| 0.3-mm Pitch Chip Scale Packages: Changes and Challenges |
| Source: DfR Solutions |
The movement to 0.3-mm pitch in chip scale packages (CSPs) can be considered inevitable. The electronics industry is rarely willing to make a leap to a unproven technology will gradual improvements in existing processes are sufficient (Moore's law bein ... read more |
| 10 Tips for Successful SOC Design |
| Source: Tensilica, Inc. |
SOC designs are major projects. They can produce high-volume, immensely profitable chips but not without risk, as is true for any big project. Most SOC design projects do not complete on time or on budget. Too many are not completed at all. Although th ... read more |
| 2.5DIC, 3DIC, and 5.5DIC: Taking Integration Into the Third Dimension |
| Source: Tech Design Forum |
Faced with a slowdown in the rate at which device integration in two dimensions is improving, IC designers are now beginning to think about moving into the third dimension in order to keep packing more functions into these same volume. Although there i ... read more |
| 3D ICs with TSVs: Design Challenges and Requirements |
| Source: Cadence Design Systems, Inc. |
As demands accelerate for increasing density, higher bandwidths, and lower power, many IC design teams are looking up 3D ICs with through-silicon vias (TSVs). 3D ICs promise "more than Moore" integration by packing a great deal of functionality into sm ... read more |
| 3D Packaging and Transistor Technology Challenges and Opportunities |
| Source: weSRCH |
This whitepaper by CEA-Leti discusses trends in 3D packaging and 3D transistors. It covers the full set of techniques and options, some specific integration schemes, through-silicon vias (TSVs) for CMOS image sensors, 3D partitioning, and memory on h ... read more |
| 3D Thermal-ADI: An Efficient Chip-Level Transient Thermal Simulator |
| Source: SIDGA |
Recent studies show that the nonuniform thermal distribution
on the substrate and interconnects has impact on the
circuit reliability and performance. Hence three-dimensional
(3-D) thermal analysis is crucial to analyze these effects. In
this paper ... read more |
| 9 Laws of Effective Systems Engineering |
| Source: Vitech Corp. |
Systems engineering is increasingly important in today's business world. Even in businesses and industries where the term "systems engineering" is unknown, the need to guide the overall design and maintenance of business products and proc ... read more |
| A 3D SOC Design for H.264 Application with On-Chip DRAM Stacking |
| Source: Pennsylvania State University |
Three-dimensional (3D) on-chip memory stacking has been proposed as a promising solution to the "memory wall" challenge with the benefits of low access latency, high data bandwidth, and low power consumption. The stacked memory tiers leverage through-s ... read more |
| A Comparison of Two VHDL Memory Modeling Techniques |
| Source: Free Model Foundry |
In February 2001 a new version of the VHDL Initiative Toward ASIC Modeling (VITAL) became
official. VITAL 2000 includes many improvements over its predecessor, VITAL 95. However, the
most dramatic change is the addition of the VITAL memory package. T ... read more |
| A Complete Design Solution for Structured ASICs |
| Source: Magma Design Automation, Inc. |
The two conventional digital IC implementation technologies – ASICs and FPGAs – have recently been augmented by an emerging technology known as structured ASICs (SAs). These devices offer complexity and performance that approach that of traditional ASI ... read more |
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