June 15, 2012 -- Simulating a circuit design before committing it to silicon is always the wise thing to do, since problems can be caught before they become costly mistakes. Analog designers' familiarity with Spice often leads them to ask for Spice models of analog-to-digital converters (ADCs).

When designers ask me for such models, I ask what they need from an ADC model. Most designers want models that show how the converter's input interacts with the external circuitry driving the ADC. One example of this is simulating the buffer amplifier's stability when charging the internal sampling capacitor of a successive-approximation register (SAR) ADC. Other engineers want to simulate loading on the voltage-reference input (for similar buffer optimization). They might want a transfer function that shows the noise and frequency response of the system, from system input to ADC input, perhaps with an "effective analog output" that takes these effects into account. It's perhaps not surprising that no one seems much concerned about simulating the ADC’s digital behavior in Spice.

In this first of a series of articles, I'll describe techniques that can help you model the input loading and verify your SAR-based data-acquisition system design.

By Rick Downs. (Downs is the Signal Chain Applications Manager for Texas Instruments' Analog eLab.)