| Accurate and Efficient Wideband On-Wafer Flicker (1/f) Noise Measurement Featured |
Sponsor: ProPlus Design Solutions, Inc. | Webcast Date: 5/14/2013 | May 14, 2013 -- 1/f noise, or flicker noise is a very key device characteristic which directly impacts the circuit performance, and has also been used to characterize the manufacturing process quality. However, accurately measuring 1/f noise at ... read more |
| Three Easy Ways to Accelerate Development of Your Embedded SOC Featured |
Sponsor: Synopsys, Inc. | Webcast Date: 5/14/2013 | May 14, 2013 -- The development of software, firmware, and hardware for embedded SOCs can sometimes be challenging because there are limited options for low-cost embedded-SOC development platforms. Many low-cost starter kits feature a standard M ... read more |
| Achieving Predictable and Highly Reliable 10G Backplane Designs Featured |
Sponsor: Synopsys, Inc. | Webcast Date: 5/9/2013 | May 9, 2013 -- This webinar explores the challenges of implementing 10-Gbps backplane systems, which can include PCB traces of 30 inches or longer with multiple connectors. Highly reliable 10G backplane systems require bit-error rates (BER) bett ... read more |
| Accelerating Time-to-Integration and System-Level Design with the Vivado Design Suite 2013.1 Featured |
Sponsor: Xilinx, Inc. | Webcast Date: 5/8/2013 | May 8, 2013 -- This webinar will explore the design methodologies and features of the Vivado Design Suite 2013.1 including the Vivado IP Integrator (IPI). Vivado IPI accelerates the integration of RTL, Xilinx IP, third party IP and C/C++ synthe ... read more |
| Design and FPGA-Prototyping of an Application Specific Processor for Embedded Vision Featured |
Sponsor: Synopsys, Inc. | Webcast Date: 5/7/2013 | May 7, 2013 -- Computer vision algorithms are typically both compute-intensive and memory-bandwidth-intensive. Plus these algorithms are evolving quickly, calling for a software-programmable implementation. To achieve real-time performance while ... read more |
| Going Mobile: A Conversation with Intel's Paul Otellini |
Sponsor: weSRCH | Webcast Date: 5/6/2013 | May 6, 2013 -- The world of computing has been upended since Paul Otellini became CEO of Intel in 2005. In this first of a two-part series, we discuss what it takes to run the world's largest semiconductor company, with details of where it's bee ... read more |
| Innovation and American Competitiveness: A Conversation with Intel's Paul Otellini |
Sponsor: weSRCH | Webcast Date: 5/6/2013 | May 6, 2013 -- In this second part, Paul Otellini tackles questions about the future viability of PCs and even the company's challenges in smartphones and tablet SOCs. Then we focus on the competitive advantage Intel achieves by manufacturing in ... read more |
| Ease Debug and Control of Network Software Using Virtual Prototypes to Do Full System Simulation Featured |
Sponsor: Synopsys, Inc. | Webcast Date: 5/2/2013 | May 2, 2013 -- In this webinar we will show how you can use a virtual prototype with a DesignWare Gigabit Ethernet model and ARM Cortex-A processor models to simulate a network application such as a server farm. We will show how the virtual prot ... read more |
| Implementing Ethernet QoS for Use in Automotive Networking Designs Featured |
Sponsor: Synopsys, Inc. | Webcast Date: 5/1/2013 | May 1, 2013 -- Ethernet is becoming mainstream in the automotive market due to the proliferation of in-vehicle infotainment systems and subsystems networked in today's automobiles. This webinar will review Audio Video Bridging (AVB), the main st ... read more |
| NanoSpice: Giga-Scale Pure Spice Simulator to Design-for-Yield Featured |
Sponsor: ProPlus Design Solutions, Inc. | Webcast Date: 4/25/2013 | April 25, 2013 -- Traditionally, designers use Spice for accuracy and FastSpice for capacity or performance. Parallelization has helped improve capacity and performance of Spice. FastSpice has not improved sufficiently in accuracy and usability, ... read more |
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