May 15, 2012 -- Hosted jointly by Synopsys and Arteris, this webinar walks through a case study demonstration of early system-level performance analysis and multicore SOC architecture optimization featuring Synopsys Platform Architect and the Arteris FlexNoC interconnect model for SystemC.
What Attendees will learn:
Learn how to efficiently explore and optimize the dynamic system performance of an Arteris FlexNoC based SOC design in SystemC using a mobile device case study example in Synopsys Platform Architect.
Using the Arteris FlexNoC configuration tool, you'll see how to set initial parameters of the Arteris FlexNoC interconnect and how to generate a SystemC TLM-2.0 AT model of FlexNoC for import and assembly in Synopsys Platform Architect.
During simulation and analysis, you'll see how to define traffic scenarios and model parameters to explore architectures in Synopsys Platform Architect, sweep through multiple simulations, and graphically analyze the root cause of performance problems .
Go directly to the EE Times Education & Training webcast site to view this presentation. Registration may be required.
Keywords: ASICs, ASIC design, EDA, EDA tools, electronic design automation, IP, intellectual property, cores, network-on-chip, NoC, on-chip interconnect, Synopsys, Arteris, EE Times Education & Training
336/38414 5/15/2012 573 21
Designer's Mall
1.171875E-02
Subscribe to SOCcentral's SOC Explorer Newsletter and receive news, article, whitepaper, and product updates bi-weekly.
