| Seeing Is Believing: How Visualization Simplifies IC DRC |
September 1, 2010 -- The 2009 Semiconductor Technology Roadmap [1] describes the problems facing future generations of silicon technology. The report analyzes the electrical and manufacturing characteristics for processes and the problems that c ... read more |
| Verification Challenges Require Surgical Precision |
It's interesting to note that, according the Q3 2009 EDAC market survey, design companies continued to buy functional-verification tools even through the recent downturn. The prognosis is that verification spending will continue to rise. While this is ... read more |
| Selecting an AES Solution |
August 2, 2010 -- The Advanced Encryption Standard (AES), based on the Rijndael algorithm which combines an extremely high level of security with computational efficiency, is an open standard selected from an open competition. The algorithm cons ... read more |
| IC Floorplanning and Power Integrity |
August 2, 2010 -- A previous article, Continuum (Analog) Analysis of Power Integrity, discussed in some detail power integrity (PI), its significance to low-power/ energy design, an ... read more |
| Defining a Universal Verification Methodology |
July 23, 2010 -- There's really no disagreement about the increasing complexity of designing system-on-chip (SOC) devices. It's clear that design is a relatively bounded problem compared to verification. Just as design reuse through semiconducto ... read more |
| Chip Power Model for Co-Design |
July 12, 2010 -- With the advancement of silicon technology and packaging, PCB technology does not happen in isolation. There is a great deal of interdependence between the IC and the interconnect world that drives technological innovation. For ... read more |
| Eliminating the "Long Loop" in FPGA Design |
July 12, 2010 -- The number of FPGA design starts continues to grow at an ever-increasing rate. In some cases, teams which previously focused on ASIC designs are migrating to FPGA implementations. This is because modern, high-end FPGAs have the ... read more |
| Low Power: The Next Big Challenge for FPGA Designers |
July 12, 2010 -- With their steadily increasing performance and density and their decreasing prices, FPGAs today are finding their way into more markets and systems than ever before. Many designers turn to FPGAs to avoid being "locked in" to cos ... read more |
| DDR3 DRAM Takes Servers to Greener Pastures |
July 1, 2010 -- DDR3 DRAM is picking up steam in consumer and corporate markets, on the threshold of becoming the most widely available main memory accounting for over 50% of the DRAM on the market, beginning in Q1 2010.
The r ... read more |
| Advanced Static Verification Is Indispensable |
June 7, 2010 -- Traditionally, simulation-based dynamic verification techniques — such as directed tests, constrained-random simulation, and hardware acceleration — have been the work horse of functional verification. As modern day SOC designs b ... read more |
| Controllable Automation and Interoperability Standards: Scaling Custom Digital Layout for Next-Generation Chip Design |
June 7, 2010 -- Layout for large digital IC designs is generally created using highly automated place-and-route (APR) tools. Although there are trade-offs for using APR instead of custom layout, the speed and confidence offered by APR far out we ... read more |
| Imagining Verification Success |
June 2, 2010 -- EDA developers need to have a very active imagination. They need to imagine becoming their own end users. Sometimes they may become the designer, sometimes the verification engineer or perhaps even the design manager. This role ... read more |
| The ROI of Hardware Configuration Management in IC Design Flows |
June 1, 2010 -- Software teams have long realized the return on investment (ROI) of software configuration management (SCM) systems. SCM systems have been used by software teams for decades to manage development, improve collaboration, and coord ... read more |
| Continuum (Analog) Analysis of Power Integrity |
May 28, 2010 -- Power integrity (PI) analysis has traditionally been conducted through the use of lumped, discrete elements and circuits, which lead to approximate models and inaccurate results. In continuum-models-based analysis, the power grid ... read more |
| "Useful" Skew-Based Optimization |
May 20, 2010 -- Clock trees are an integral part of any chip, and making them do what they should be doing is far less the expectation when designers try to build clock trees. Traditionally, clock trees are built to distribute clocks from the cl ... read more |
| Evolving Your Organization’s ABV Capabilities |
May 17, 2010 -- Ensuring functional correctness on RTL designs continues to pose one of the greatest challenges for today’s FPGA and ASIC design teams. Very few project managers would disagree with this statement. In fact, an often cited 2004 in ... read more |
| Design Reuse – It’s Time for New IP-Creation Tools |
May 10, 2010 -- For many years, design reuse has been touted as an essential part of completing projects on-time and on-budget. This idea is not new and the expression "don’t reinvent the wheel" is used in high-tech environments the world over f ... read more |
| Low-Power Design Applications for Formal Verification |
May 7, 2010 -- Low-power designs have become ubiquitous in today’s world. Designers of consumer and mobile products create aggressive low-power designs to compete on extended battery life. Tethered device designers (e.g., servers and routers) wa ... read more |
| Enabling Assertion-Based Verification |
May 7, 2010 -- Assertions are properties or facts describing the required and forbidden behavior of a design. They are "executable specifications" that are monitored during simulation by assertion checkers included in the design file. ... read more |
| Realizing ESL with Scalable Transaction-Level Models |
May 3, 2010 -- The effectiveness and productivity of RTL modeling and verification techniques are sinking under the weight of growing design complexity. Traditional design and verification methodologies were not intended to address the billions ... read more |
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