October 9, 2006 -- There's a new kid on the block in the embedded memory space – Novelics. In fact, this column is "hot-off-the-press," because the folks at Novelics only came out of stealth mode a few days ago to tell the world that they actually existed. But even though they're spanking new, I think it's safe to say that the little rapscallions have hit the ground running with all cylinders firing and all guns blazing (I never metaphor I didn't like).

So what is Novelics? What do they do? And why should we care? In a nutshell, the guys and gals at Novelics have a mission to be your "one-stop-shop" for any form of memory that you wish to embed in your ASIC/ ASSP/ SOC design. And why is this so important? Well, even today, 50% or more of a silicon chip may be consumed by memory; and, by 2016, it's expected that memory will account for 95% or more of a large percentage of new designs.

But what's the big deal? Don’t lots of folks supply embedded memory IP? Well yes, there are a number of suppliers, but they each typically provide only a subset of memory options. For example, if you want an embedded SRAM IP for your design, you can certainly find someone who'll be delighted to sell it to you. But suppose you also need an OTP (One-Time-Programmable) memory IP? Well, depending on your specific requirements, you may need to go to someone else for that. And what happens if you also wish to include some Flash in your design? Well, maybe you'll need to find yet another IP vendor … and so it goes.

It can obviously be a pain dealing with multiple suppliers for your various memory requirements, but things can get even worse. If you want standard 6T SRAM (that's SRAM in which each memory cell is formed from six transistors), then at least this can be created on a standard CMOS process. So does this mean that as soon as a new technology node becomes available you can immediately start embedding this 6T SRAM in your design? It depends on the vendor who is selling you the IP.

If the memory vendor's IP is based on standard cells from the foundry's cell library then you're good-to-go; but if the vendor is using its own custom cells, you may have to wait awhile twiddling your thumbs while these cells are qualified under the new technology node. This is obviously going to cause you some grief if your major competitor is designing using memory IP that is already available.

And what about 1T SRAM? This is where a single transistor is used to represent each cell. But isn’t this DRAM? Well, yes and no. It's certainly true to say that if we look under the hood this looks very much like DRAM on a single-cell basis. The way this form of memory IP is packaged, however, actually appears to be a block of (very dense) SRAM to the outside world (i.e., the rest of your design). The problem is that this typically requires some extra steps "on top" of a standard CMOS process.

Similarly, if you wish to use Flash memory in your design, this also has traditionally required some extra process steps "on top" of the regular CMOS process, which is why Flash-based devices are usually a technology generation (node) behind SRAM-only-based devices.

Enter Novelics

There really should be a fanfare of trumpets at this point, because the folks at Novelics have come up with something ultra-cool. Actually, when I say "something" I should really be saying "oodles and oodles of things" because they have something for everyone. But where to start? Well, how about with the MemQuest tool, which I like to think of as a "memory to order generator" (see Figure 1).

Figure 1. MemQuest generates memory IP blocks to order.

OK, so this is already rather cool. Using MemQuest, you specify the sort of things you'd expect – like the width and depth of your required memory block. You also get to decide just what type of memory you want: SRAM (1T or 6T), Flash, OTP, ROM, and so forth. You also get to specify a whole bunch of other requirements (speed, power, and so forth). When you're ready to rock-and-roll, MemQuest performs concurrent optimization for speed, density, power consumption, cost, and so forth, and then generates the memory block of your dreams.

Just in case you were wondering, the "CAM" in "coolCAM" in the Figure stands for Content Addressable Memory. The folks in networking use this a lot. One way to visualize this is that, in the case of normal memory, you present the memory with an address and it gives you the data; with CAM, you give it the data and it gives you the address. But don’t worry about it; the folks at Novelics have a really elegant CAM implementation that dramatically reduces power consumption for CAM blocks.

And what, exactly, does MemQuest generate? Well, you get views in the following file formats: *.pdf, *.lib, *.lef, *.v, *.vhdl, *.cir, *.GDSII, *.mbist, *.tetramax … (truth to tell, I don’t even know what some of these formats are).

But wait, there's more! ("No," you cry, "There can’t be!" – "Yes," I respond, "There jolly well is!) For example, all of these different types of memory are formed using a standard CMOS process (that is, they don’t require any extra layers or doping steps). Furthermore, they're constructed using standard cells from the foundry's libraries. This means that these memories can be available as soon as a new technology node comes online.

On top of this, each type of memory has a bunch of exciting features. In the case of coolSRAM blocks, for example, they employ patented circuit techniques that provide very low leakage and active power in the core and peripheral circuits; they support standby, sleep, and power-down modes; they offer row and column redundancy; and they boast ECC and BIST wrappers for yield optimization. Similarly, in the case of coolROM blocks, only a single metal of via layer is required for programming, and Novelics claims up to 10X lower active power, "zero" leakage current, and up to 2X area savings compared to the industry standard.

In fact, across the board for all of these memories, the folks at Novelics claim higher speed, higher density, lower power, and lower cost than any of their competitors. So can they do what they say they can do? Since the founders have more than 30 years of advanced memory design experience at Broadcom, Intel, and Ericsson, and the management team has over 60 years of semiconductor, EDA, and IP industry experience (coupled with 92 patents in their names and 8 more at Novelics), I'm inclined to say yes! And I am absolutely delighted to award the little scamps an official "Cool Beans."

For more information about Novelics or MemQuest, call 949-448-5900 or email info@novelics.com.

Until next time, have a good one!