August 2, 2006 -- Texas Instruments, Inc. (TI) announced today full-production release of its new PCI Express x1 physical layer (PHY) device, the XIO1100. The XIO1100 is targeted at markets demanding low-cost PCIe end-point solutions such as data acquisition, industrial, networking and communication, medical and imaging, as well as consumer and video. XIO1100 is compliant with the PCI Express Base Specification Revision 1.1 and PHY Interface for the PCI Express Architecture (PIPE) 1.0.
XIO1100's flexible MAC interface supports both source synchronous and DDR clocking. "This offers distinct advantages to designers in terms of faster time to market and enabling lower cost solutions," said Jawaid Ahmad, Strategic Product Marketing Manager for TI's digital interface business unit. "SS clocking makes I/O layout robust and painless while DDR clocking offers our customers the opportunity to choose low-cost FPGAs which do not run faster than 125MHz."
Adding to its list of features, the XIO1100 has an integrated adaptive equalizer in its receive link, providing system design flexibility and reliably increasing interconnect length supported by the XIO1100.
Pricing and Availability
The XIO1100 is available today in a 100-pin MicroStar BGA in Pb or Pb- free RoHS-compliant package. 1K unit reference price is $7/unit. TI also offers third-party development kits based on XIO1100 and Cyclone II or Spartan 3 FPGAs.
Go to the Texas Instruments, Inc. (TI) website for details.