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 Category: News: News Archive 2007: Saturday, May 25, 2013
Toshiba Information Systems Adopts Catapult C Synthesis for Next-Generation ASIC Design  
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December 4, 2007 -- Mentor Graphics Corp. announced today that Toshiba Information Systems (Japan) Corp. has adopted Mentor Graphics Catapult C Synthesis tool to develop its next-generation ASICs for audio, communication and image processing systems.

"We custom develop various chips for our customers, from block-level to complete system-on-chip (SOC), for applications including imaging, communication, audio and control. Catapult C Synthesis helped us extend our design service because we are now able to take our customers’ rich C language design asset and immediately turn it into hardware," said Akira Nakazawa, Expert, Sales Department II, Embedded System Sales Division, Toshiba Information Systems. "By using Catapult C Synthesis, we can significantly shorten their time-to-market, while flexibly supporting high-level design, that will help further enhance our win-win relationship with customers."

The Catapult C Synthesis tool is the first product to automatically generate RTL from a pure ANSI C++ source where both the core algorithm and interface are untimed. This productivity improvement gives designers time and freedom to automatically perform detailed design exploration of different micro-architectural options and interface scenarios to quickly achieve fully optimized hardware designs for either ASIC or FPGA implementations. Catapult’s SystemC verification extension offers integration to industry standard SystemC verification platforms and tools providing a complete electronic system level (ESL) design and verification methodology.

"We have applied Catapult C Synthesis to an eigenvalue decomposition circuit, and it was right on the target; a perfect fit. Eigenvalue decomposition algorithms contain a myriad of operators, performing trigonometric, square root, multiplication and division calculations, and it is a complex circuit with all of these operations closely intertwined. Even preparing a SystemC description for behavioral synthesis would require enormous amounts of time and effort, not to mention difficulties with RTL," said Akiyoshi Ohguro, Group Leader, LSI Design Center Dept.5, LSI Solution Division II, Toshiba Information Systems. "The ability of Catapult C Synthesis to perform algorithmic synthesis from ANSI C with quantization is truly amazing. Also, for eigenvalue decomposition, you must prepare many designs with different array sizes, using real numbers and complex matrixes, etc. for each application (MIMO, MUSIC method, diversity and KL conversion, etc.). With Catapult C Synthesis, this was simply a matter of changing the algorithm in C, and with some trial and error we were able to produce RTL suitable for each application in just one day or several days at most."

Go to the Mentor Graphics Corp. website to find additional information.

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Keywords: Mentor Graphics, Catapult C Synthesis, SystemC, verification, ASIC design, EDA tools,
571/24465 12/4/2007 4012 299


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