| Spansion Selects Berkeley Design Automation Analog FastSpice for Multi-Chip-Package Performance Verification | | |
December 18, 2007 -- Berkeley Design Automation, Inc. today announced that Spansion has selected the company’s Analog FastSpice circuit simulator for full-circuit verification of its multi-chip-package (MCP) devices for high-performance, low-power, small-footprint applications such as cellular handsets, personal information devices, and GPS receivers.
"Verifying our leading-edge flash circuits with advanced multi-chip packages requires transistor-level performance simulation with over 200,000 elements, including 142 mutual inductors,"” said Jim Thomas, Corporate Vice President of Product Development at Spansion. "Traditional Spice simulators cannot handle this complexity, and digital fastSpice simulators do not have the required accuracy. Analog FastSpice can produce true Spice accurate results for this critical application. AFS completes what is otherwise impossible in less than 9 hours."”
Berkeley Design Automation tools include Analog FastSpice circuit simulation, RF FastSpice periodic analyzer, and PLL Noise Analyzer. The company guarantees identical waveforms to the leading "golden" Spice simulators down to noise floor (typically ~0.1%) while delivering higher performance andhigher capacity. It achieves this by using advanced algorithms and numerical analysis techniques to rapidly solve the full-circuit matrix and the original device equations without any shortcuts that could compromise accuracy.
Go to the Berkeley Design Automation, Inc. website to find additional information.
| E-mail Berkeley Design Automation, Inc. for more information.
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| Keywords: Berkeley Design Automation, Spansion, FastSpice, Spice, Circuit simulation, ASIC design, EDA tools,
| | 571/24575 12/18/2007 2097 173 | |
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