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 Category: Magazine & Journal Articles Online: Article Archive 2006: Wednesday, May 22, 2013
Keys to Simulation Acceleration and Emulation Success   Featured
Publication: EDN Magazine
Contributor: Cadence Design Systems, Inc.
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April 27, 2006 -- According to industry pundits, FPGAs take forever to compile and have internal timing problems. ASICs, on the other hand, are power-hungry and require longer development time. When it comes to choosing an emulation system, the underlying technology contributes to the characteristics of the system, but designers spend far too much time on low-level technological details and not enough time on how emulation accomplishes the verification job by providing high performance and high productivity.

When engineers discuss FPGAs versus custom processors, they mean prototyping versus simulation acceleration and emulation. To add to the confusion, some semiconductor companies call the internally developed FPGA prototype an emulator. By exploring the factors that are important when evaluating simulation acceleration and emulation and the use of modes and applications for acceleration and emulation, engineers can make educated decisions about the types of technology and modes of operation that are most beneficial for their verification projects.

By Jason Andrews. (Andrews is a senior product-marketing manager at Cadence Design Systems, Inc.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EDN Magazine website.

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Cadence Design Systems, Inc.
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Keywords: EDN Magazine, Cadence Design Systems, FPGAs, prototyping, verification, emulation, EDA tools,
575/18855 4/27/2006 8347 729


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