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 Category: News: News Archive 2008: Sunday, October 23, 2016
ASSET Becomes Founding Members of iNEMI's Boundary Scan (JTAG) Adoption Initiative  
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August 28, 2008 -- ASSET InterTech, Inc. recently became a founding member of the International Electronics Manufacturing Initiativeís (iNEMI) boundary scan adoption project. iNEMI, which is an electronics industry consortium of over 70 manufacturers, suppliers and related organizations, has undertaken an effort to encourage greater adoption of the IEEE 1149.1 boundary scan standard (commonly known as JTAG, after the Joint Test Action Group which defined the original specification).

"Boundary scan is an excellent example of how the efforts of a cross-industry group can benefit all of the electronics industry," said Jim McElroy, iNEMIís Chief Executive Officer. "If we can generate greater support for boundary scan among electronic design automation (EDA) tools suppliers and chip makers, many of the downstream electronics companies such as circuit board makers and systems providers stand to benefit greatly because their products will improve in quality. Their test procedures will be more comprehensive and less costly."

As a first step in the process, iNEMIís boundary scan project group is undertaking a survey of the electronics industry to determine the technologyís current adoption rate and to identify any possible impediments to more widespread use of boundary scan. If obstacles are identified, the group will develop and implement solutions for removing them. Alan Sguigna, Vice President of Marketing and Sales, represents ASSET on iNEMIís boundary scan project group.

"Since its development in the 1990s, adoption of boundary scan has benefited the industry greatly. We want to expand upon this base and take it up to another level," said Sguigna. "We feel that the boundary scan ecosystem is not yet complete and we want to do what we can to ensure this technology can be applied effectively in design validation, test and debug applications for chips, circuit boards and systems. This will pave the way for other standards that support methodologies for more complex embedded instruments, such as the Internal JTAG (IJTAG IEEE P1687) standard that is currently being developed."

Go to the ASSET InterTech, Inc. website to find additional information.

E-mail ASSET InterTech, Inc. for more information.

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ASSET InterTech, Inc.

Keywords: ASSET InterTech, boundary scan, JTAG, ASICs, ASIC design, PCB design, EDA tools,
578/26566 8/28/2008 968 212
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