Page loading . . .

  
 Category: News: News Archive 2009: Friday, May 24, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 (1811 Entries)
POLYTEDA Releases PowerDRC/LVS Vversion 1.1 

December 2, 2009 -- POLYTEDA Software Corp. has announced the general availability of PowerDRC/LVS version 1.1. PowerDRC is designed to process integrated circuit designs of any size, at any technology node, with run times which are fast ... read more

Novelics, Chips & Media, and Posedge Join IPextreme Constellations 

December 1, 2009 -- IPextreme, Inc. announced today that Novelics, Chips & Media, and Posedge have joined Constellations, a program by IPextreme designed to increase sales opportunities for leading semiconductor intellectual property (IP) ... read more

Agilent Technologies Completes Acquisition of Keithley Instruments' RF Product Line 

November 30, 2009 -- Agilent Technologies, Inc. and Keithley Instruments, Inc. today announced that the sale of substantially all of Keithley’s RF product line to Agilent is now complete. As Keithley previously announced, the parties had ... read more

Actel Extends Core8051s Processor Support to RTAX, Axcelerator and Igloo Families 

November 30, 2009 -- Actel Corp. today announced that it has extended Core8051s support for its line of high-reliability Axcelerator , radiation-tolerant RTAX and low-power Igloo FPGAs. By broadening Core8051s support, Actel enables desig ... read more

Atrenta SpyGlass-Constraints SDC Equivalence Verification Capability Adopted By STARC 

November 30, 2009 -- Atrenta, Inc. has announced the integration of the SpyGlass-Constraints SDC equivalence verification capability into the production flow from the Semiconductor Technology Academic Research Center (STARC).

Atrent ... read more

AWR and AMPSA Partner to Bring Multimatch Amplifier Design Technology to Microwave Office 

November 30, 2009 -- AWR Corp. and AMPSA, a supplier of RF and microwave amplifier design software, today announced a relationship that enables AWR to incorporate AMPSA’s Multimatch amplifier design technology as an optional module into i ... read more

Spansion MirrorBit Flash Memory Now Available as Xilinx Spartan-6 FPGA Configuration Solution 

November 30, 2009 -- Spansion, Inc.'s MirrorBit Flash memory is now available as a verified configuration solution for the new Xilinx Spartan-6 FPGA family. Spansion is offering a MirrorBit Multi-I/O Flash add-on module that is compatible ... read more

STATS ChipPAC Ramps eWLB Technology to High-Volume Production 

November 30, 2009 -- STATS ChipPAC, Ltd. has ramped first-generation embedded Wafer-Level Ball Grid Array (eWLB) technology to high volume production. The eWLB technology provides solutions for semiconductor devices requiring a higher int ... read more

SpringSoft and Magma Validate Full Interoperability of Custom Chip Design Tools with TSMC 65-nm iPDK 

December 1, 2009 -- SpringSoft, Inc. and Magma Design Automation, Inc. have completed cross-tool validation using TSMC’s 65-nm interoperable process design kit (iPDK). The companies demonstrated full interoperability between the Sp ... read more

Esterel Technologies and Quantum3D Form Strategic Alliance to Offer One-Stop Solution for Embedded Graphics Display Development 

December 2, 2009 -- Esterel Technologies, Inc. and Quantum3D, Inc., a developer and manufacturer of commercial-off-the-shelf (COTS), open-architecture, real-time visual computing solutions have announced a strategic alliance to benefit de ... read more

Novocell Semiconductor Announces Development of a Multi-Time Programmable Antifuse Bit Cell 

December 2, 2009 -- Novocell Semiconductor, Inc. today announced the development of 2nTP, a new multi-time programmable (MTP) technology that allows the programming of its one-time programmable (OTP) antifuse bit cell up to eight times. ... read more

Synfora Adds Support for Xilinx Virtex-6 and Spartan-6 FPGA Devices to PICO Algorithmic Synthesis Tool 

December 1, 2009 -- Synfora, Inc. has announced a new version of its PICO Extreme FPGA C synthesis tool with support for the next-generation Xilinx Spartan-6 and Virtex-6 devices as well as seamless integration with the Xilinx Embedded De ... read more

Magma Announces Talus-Based RTL-to-GDSII Reference Flow for Imagination Technologies' PowerVR Graphics Accelerator  

December 2, 2009 -- Magma Design Automation, Inc. today announced the availability of an RTL-to-GDSII reference flow for system-on-chip (SOC) designs that incorporate PowerVR SGX graphics accelerator cores from Imagination Technologies, L ... read more

Sonics Offers Free Evaluation for Designers of Sonics Network for AMBA Protocol Solution  Featured

December 2, 2009 -- Sonics, Inc. has announced that its Sonics Network for AMBA Protocol (SNAP) will offer SOC designers, free-of-charge, tools and IP for capturing and analyzing bus designs with the release of its new Web-based SNAP eval ... read more

X-FAB and Plus Semi Agree on Sale of X-FAB UK 

December 1, 2009 -- X-FAB Silicon Foundries and Plus Semi have agreed on the sale of X-FAB’s wafer fabrication plant in Plymouth, UK, to Plus Semi. The agreement to transfer ownership of X-FAB UK to Plus Semi has been signed by bot ... read more

Altera's Stratix IV FPGAs to Power XtremeData's dbX Analytics Appliance 

December 2, 2009 -- Altera Corp. today announced its high-performance Stratix IV FPGAs have been designed into XtremeData, Inc.'s next-generation dbX family of database appliances designed specifically for the unconstrained analysis and e ... read more

Magma Announces Talus Design 1.1 and Talus RTL 1.1 Enhanced Synthesis Products 

December 2, 2009 -- Magma Design Automation, Inc. has announced the availability of Talus Design 1.1 and Talus RTL 1.1, Magma's full-chip synthesis products. Capabilities in these new versions include GlassBox abstraction technology; enha ... read more

Altium Releases Smart Prototyping Peripheral Board for NanoBoard Development Platforms 

December 1, 2009 -- Altium, Ltd. has released a new prototyping peripheral add-on board for its NanoBoard FPGA-based development boards. The new board works with both the fixed-FPGA NanoBoard 3000 and the fully-configurable NanoBoard NB2. ... read more

TI Introduces Lowest Power 250-MSPS, 14-bit ADC 

November 30, 2009 -- Texas Instruments, Inc. (TI) has introduced the first in a new class of high-speed analog-to-digital converters (ADCs) delivering ultra-low power consumption and excellent dynamic performance across wide signal bandwi ... read more

MoSys Announces Availability of Silicon-Proven 40-nm DDR3 and DDR3/2 Combo PHYs with Support for Datarates Up to 2133 Mbps 

November 30, 2009 -- MoSys, Inc. has announced the availability of its silicon-proven DDR3 and DDR3/2 combo PHYs. MoSys' fully-integrated solution complies with the latest DFI specification and provides the physical layer (PHY) interface ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.589  3.140625