Page loading . . .

  
 Category: News: News Archive 2009: Thursday, April 17, 2014
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 (1798 Entries)
K-micro Unveils OLT SerDes PHY for 10GEPON Applications 

May 13, 2009 -- K-Micro (Kawasaki Microelectronics) has announced a unique OLT SerDes PHY for 10-Gbps Ethernet Passive Optical Network (10GEPON) applications. Targeted to meet the emerging IEEE802.3av standard developed by the 10GEPON tas ... read more

Intersil's New 5-Volt Low-Drift pinPoint Op Amp Features Industry's Highest Accuracy at High Gain and Lowest Power 

May 13, 2009 -- Intersil Corp. has launched what the company claims is the industry's most accurate 5-V single-supply, precision, low-power, low-drift op amp for high gain, 16-bit and 24-bit precision applications. The new Intersil pinPo ... read more

Synopsys Launches IC Validator, Offers Significant Reduction in Physical Verification Turnaround Time for Advanced Designs 

May 13, 2009 -- Synopsys, Inc. has announced the IC Validator DRC/LVS solution for in-design physical verification and signoff for advanced designs at 45nm and below. Architected to deliver the high accuracy necessary for leading-edge pro ... read more

Open-Silicon Expands in India/ Taiwan and Appoints Industry Veteran as COO 

May 7, 2009 -- Open-Silicon, Inc.has announced the hiring of Shrikrishna Gokhale as COO of the company and managing director for its rapidly expanding India operations. He will be taking up this assignment by mid-May.

"Our business ... read more

Panel Sessions in 46th DAC Program Cover Wide Range of Issues Affecting Chip Design, Technology, Business 

May 8, 2009 -- The 46th Design Automation Conference (DAC) will offer a range of panels, including a first-ever keynote panel with the top three electronic design automation (EDA) CEOs and a special plenary panel on green technology. In a ... read more

46th DAC Announces Technical Program 

May 7, 2009 -- The 46th Design Automation Conference (DAC) has announced its technical program, which includes 54 research paper sessions, featuring 156 talks selected from 733 submissions from around the globe. A new highlight of the tec ... read more

Jazz Semiconductor Announces Cadence Virtuoso IC 6.1 Platform Techtorial 

May 7, 2009 -- Jazz Semiconductor, Inc. will host a techtorial featuring the Cadence Design Systems Virtuoso IC 6.1 custom design platform entitled, "Knowing Your Design Is Right." The techtorial will be held on June 4, 2009 at Jazz headq ... read more

EDA Consortium Conducts Multi-Faceted Investigation Into EDA Software Piracy  Featured

May 6, 2009 --The EDA Consortium (EDAC) Anti-Piracy Committee is conducting an on-going investigation into EDA software piracy on multiple fronts. The EDA Consortium (EDAC) is working with multiple companies in the anti-piracy field to in ... read more

Cadence Encounter Digital Implementation System Used by Gennum's Snowbush IP Group for 45-nm USB 3.0 PHY IP 

May 7, 2009 -- Cadence Design Systems, Inc. announced today that Gennum Corp.'s Snowbush IP Group utilized the Cadence Encounter Digital Implementation System to develop the first 45-nm SuperSpeed USB 3.0 PHY IP core. Encounter was used f ... read more

Achronix Taps Signali for 10/ 40/ 100Gbps Encryption IP In Its Fast FPGAS 

May 7, 2009 -- Achronix Semiconductor Corp. has announced the availability of new, high-performance Advanced Encryption Standard (AES) IP cores for its Speedster 1.5-GHz family. These high-performance 128-bit key size AES cores, from Sign ... read more

eASIC Accelerates DSP Efforts with New IP Cores 

May 7, 2009 -- eASIC Corp. has announced the immediate availability of two new DSP IP cores, an FFT and FIR filter compiler, to accelerate itís move into the high-performance DSP market. The new FFT core, available from eASIC, supports po ... read more

Magma's Quartz DRC in Use at PDF Solutions for Leading-Edge Process Yield Improvement 

May 6, 2009 -- Magma Design Automation, Inc. today announced that PDF Solutions, Inc. used Magma's Quartz DRC Physical Verification system to develop a characterization vehicle test chip for a leading semiconductor manufacturer. Th ... read more

Free Open SystemC Initiative Video Tutorial Details TLM-2.0 in Action  Featured

May 5, 2009 -- The Open SystemC Initiative (OSCI) is presenting a free, online video tutorial titled "TLM-2.0 in Action: An Example-based Approach to Transaction-level Modeling and the New World of Model Interoperability. This video tutor ... read more

EDA Startup Agnisys Announces Tool for Register Management of IP and SOCs 

May 6, 2009 -- Agnisys Technology Pvt., Ltd. has announced the release of IDesignSpec( IDS), a new tool for register management and automation for hardware designs. IDS decreases the time and effort to specify hardware registers and autom ... read more

ChipStart Begins Distributing PDTi SpectaReg EDA Tool 

May 6, 2009 -- ChipStart will begin distributing PDTi's SpectaReg on-chip register automation tool which uses a Software-as-a-Service (SaaS) model.

By using a SaaS model, engineering teams can now realize the same benefits for their ... read more

AWR Adds TriQuint Semiconductor Microwave Devices to Microwave Office Software 

May 6, 2009 -- AWR Corp. announced that users of AWR's Microwave Office design software now have access to XML library data for a broad array of microwave amplifiers from TriQuint Semiconductor, Inc.ís San Jose design center (formerly WJ ... read more

Study Shows Mainland China Engineers Learn About Brands Before Searching for Products Online 

May 6, 2009 -- Fifty-six percent of mainland China engineers search online for technology and vendors using brand-specific keywords. This is according to a survey undertaken by Global Sources', EE Times-Asia and Electronic Design-China magazine ... read more

OCP-IP Releases OCP 3.0 Specification 

May 6, 2009 -- The Open Core Protocol International Partnership (OCP-IP) today announced the release of the OCP 3.0 specification for member review. This latest version contains extensions to support cache coherence and more aggressive po ... read more

Sonics Addresses Challenge of Designing Embedded SOCs Containing Multiple IP Blocks 

May 5, 2009 -- Sonics, Inc. has announced the Sonics Network for AMBA Protocol or SNAP. The product is a cost-effective, turn-key solution designed to simplify the on-chip bus design for complex embedded SOCs by turning multilayer bus des ... read more

NXP Ships Highest Performance Cortex-M3-based Microcontrollers 

May 5, 2009 -- NXP Semiconductors has confirmed that the LPC1700 series is the industryís highest performance Cortex-M3 microcontroller, based on results from the Embedded Microprocessor Benchmark Consortium (EEMBC). The EEMBC results sho ... read more




 Search for:
            Site       Current Category  
   Search Options


Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Executive
Viewpoint

Progressive Static Verification Leads to Earlier and Faster Timing Sign-off


Graham Bell
VP of Marketing,
Real Intent

Executive
Viewpoint

Threading the Way
through
SOC Verification


Thomas L. Anderson
VP of Marketing,
Breker Verification Systems

Odd Parity

What? You Haven't Made Any Resolutions?


Mike Donlin
The Write Solution

Odd Parity Archive

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters



About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.589  3.203125