|Publication: EDN Magazine|
Contributor: Open-Silicon, Inc.
September 8, 2010 -- Despite the work done by various standards groups such as the VSIA, GSA IP group, and SPIRIT, IP integration still remains quite challenging. First, one has to select the right IP business model, decide to either make or buy the IP, and select the appropriate IP cell. After the appropriate IP cell is selected, its integration into the design is not an easy task. There is a lot of information available about IP integration in general, most of which relates to the integration and verification of soft IP cells. However, hard IP integration also poses several challenges, resulting in many issues the designer must address when integrating a hard IP cell.
This article discusses details of the factors involved in hard IP integration, from IP selection through verification of the IP cells. It is an attempt to bring out most of the issues involved in the physical integration of a hard IP cell. It may not be a complete list, but it will go a long way in helping physical designers successfully be IP integrators.
By Rahul Deshmukh. (Deshmukh is senior design manager at Open-Silicon, Inc.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the EDN Magazine website.
Read more about
|Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, EDN Magazine, Open-Silicon, |
|596/32160 9/13/2010 2315 205|