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 Category: Magazine & Journal Articles Online: Article Archive 2010: Thursday, June 20, 2013
How to Choose Great IP   Featured
Publication: Design & Reuse
Contributor: Synopsys, Inc.
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October 6, 2010 -- There is immense pressure within the industry to reduce the cost of design, and sourcing low-cost IP is an attractive option. But a design team's choice of standards-based IP affects risk, schedule and quality for the entire chip; any compromise can spell disaster for the whole project. Design teams would do well to think in terms of total cost of ownership when they look at the business case for IP procurement.

It's a common misperception that standards-based IP is easy to create. You can download the specification from the PCI-Special Interest Group (PCI-SIG), USB-Implementer's Forum (USB-IF) or any number of other standard organizations. There is even verification IP commercially available that can help you to verify your implementations. Also, since any number of small companies or consultants can develop the IP, there may be an opportunity to get a really great deal on it. However, those looking to procure IP should keep in mind that not all IP is created equal and should consider what goes into developing high-quality IP.

By Ed Bard and Ralph Morgan. (Bard is a Senior Director Of Product Marketing, for the Synopsys, Inc. DesignWare IP team and Morgan is Vice President, Engineering, for DesignWare IP.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the Design & Reuse website.

Read more about
Synopsys, Inc.
on SOCcentral.com

Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, Design & Reuse, Synopsys, DesignWare IP,
596/32296 10/6/2010 2400 232
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