March 24, 2010 -- Denali Software, Inc. and Carbon Design Systems, Inc. are collaborating to provide designers with cycle-accurate models of Denali's configurable Databahn DDR SDRAM controller IP for virtual platforms. Databahn IP models are available today for use with leading system simulation environments (including Carbon SoC Designer, CoWare Platform Architect, and OSCI SystemC) to perform architectural analysis, validate system performance, and perform hardware/software integration prior to silicon.

"Our customers are using Denali's high-performance Databahn DDR-SDRAM IP to architect some of the world's most complex system-on-chip (SOC) designs," stated Bill Neifert, Vice President of Business Development at Carbon. "Adding Databahn DDR memory interface models to our IP offerings gives our mutual customers the ability to leverage the advanced capabilities of the platform across more of their designs."

DDR SDRAM plays a critical role in overall system performance in a variety of applications including consumer, communications, and computing. This collaboration delivers 100% cycle-accurate models of this vital IP to the engineers who need it most: architects making critical performance trade-offs and firmware developers debugging presilicon software.

"Denali is committed to expanding the ecosystem around our broad range of high-quality controller IP to ease our customers' design process," said Marc Greenberg, Director, Technical Marketing at Denali Software. "Partnering with Carbon to make models of our DDR SDRAM controller cores available in SoC Designer and other virtual environments gives our customers access to a valuable platform to perform architectural exploration, optimize system performance, and debug complex firmware issues earlier and more accurately than previously possible."

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