Page loading . . .

 Category: News: News Archive 2010: Wednesday, October 26, 2016
Altera and Apical Deliver HD Wide Dynamic Range FPGA Solution for Surveillance  
 Printer friendly
 E-Mail Item URL

March 24, 2010 -- Altera Corp. and Apical, Ltd. have announced the first high-definition wide dynamic range (WDR) CMOS image-sensor-processing solution for video-surveillance cameras. Altera and Apical's complete solution ensures superb video-image quality regardless of varying lighting conditions, a major stumbling block for previous generations of surveillance cameras. Featuring Altera's Cyclone III and Cyclone IV FPGAs, and Apical's intellectual property (IP), this solution supports Aptina's new MT9M033 High-Definition WDR CMOS image sensor.

Standard CMOS image sensors are limited by the vast ranges of brightness levels, from low light to direct sunlight, that can black out or wash out a video subject. WDR CMOS image sensors correct this problem, but present a design challenge. The large amounts of data (up to 20bits/color X 1.2Mpixels at 60 frames per second) generated by these image sensors must be processed in the Image Sensor Pipeline (ISP), but are too much to be handled on-chip. The DSPs and ASSPs typically used in surveillance systems do not have the ability to handle the processing task efficiently. Altera's Cyclone FPGAs have the capability to perform the intense number-crunching algorithms that convert the raw image data into a standard digital output needed to produce a clear video image.

"While previous sensors have shown good performance in either low-light or bright-light conditions, they've never been able to do both, until now," said Michael Tusch, CEO of Apical Ltd. "Once we realized DSPs couldn't perform the functions we needed, we turned to Altera's Cyclone FPGAs because they offered the performance required to run Apical's IP for the cost point and power restrictions for the surveillance market."

The sensor-processing design implemented in the FPGA is provided by Apical. The IP from Apical includes the full ISP, which performs the auto-exposure, auto-gain, and auto-white balancing that contribute to clear video images in extreme low-light and bright-light conditions. Apical's IP also optimizes video images by incorporating Apical's iridix local-tone-mapping engine, which mimics the human eye, with high-performance 2D or 3D noise reduction, and advanced color processing. The Cyclone III and Cyclone IV families of FPGAs perform all of these functions at industry-leading clock rates, logic utilization, and power consumption.

Go to the Altera Corp. website for details.

E-mail Altera Corp. for more information.

Read more about
Altera Corp.
Apical, Ltd.

Keywords: FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, CMOS image sensors, Altera, Apical,
597/30958 3/24/2010 1647 227
Designer's Mall

 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
and receive news, article, whitepaper, and product updates bi-weekly.


Verification Contortions

Dr. Lauro Rizzatti
Verification Consultant
Rizzatti, LLC

Real Talk

Drilling Down on the Internet of Things

Ramesh Dewangan
VP Product Strategy
Real Intent, Inc.

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
DSP Design
Analog Design
Digital Design
Mixed-Signal Design
RF Design
EDA Tool Development

IC Packaging
PCB Design
RTOS Development
RTL Design
SystemC Design
SystemVerilog Design
Verilog Design
VHDL Design

Post a Job
Only $100 for 30 days

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Design Center
Tutorials, Whitepapers & App Notes
Archived Webcasts


Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.597  0.65625