April 26, 2010 -- CebaTech, Inc. has announced the launch of its CebaFlex series of PCI Express-enabled subsystem boards that boost protocol-processing performance in data networking and enterprise storage systems by up to 10X. Executing critical application protocols in FPGA-based hardware with a streamlined path to very low cost implementation for high-volume applications, CebaFlex off-loads the central processing unit (CPU), freeing up valuable CPU cycles, which can be used for higher value-add application processing. This off-load significantly improves the system-level performance-to-cost ratio.

CebaFlex’s re-programmability enables OEM customers to rapidly deploy next-generation equipment, independent of the CPU technology lifecycle. Its in-system upgrade capability enables the after-market addition of new software functionality to the system, boosting performance, and enabling OEM customers to continuously address emerging market opportunities with speed and agility.

Enhancing data networking and storage application performance

CebaFlex addresses the missing link in the hardware realization of storage and data networking protocol stacks. The transport and link-level framing protocols have already benefited greatly from their migration to hardware implementations. CebaFlex migrates the missing link – the data management layer – from slow and power-hungry CPU executed software, to FPGA-based hardware, achieving an order of magnitude improvement in performance at a fraction of the cost of developing a custom chip – and with the added advantage of being re-programmable.

CebaFlex production-ready boards meet the tough reliability and environmental operating standards required by embedded systems equipment, and are used for both prototyping and product realization. The PCI Express interface enables plug-and-play connection to standard network and storage chassis. The initial CebaFlex offering supports industry-standard data-management functions such as GZIP compression, GUNZIP decompression and AES encryption algorithms, using the company’s CebaRIP rapidly tunable intellectual property (IP) core library. CebaTech also implements custom protocols in CebaFlex subsystems as a full turnkey solution.

Making successful system-level-trade-offs

CebaFlex leverages its ANSI C-to-hardware compiler technology to design and tune hardware implementations of both standard and custom protocols to meet the different performance, power and area trade-offs required by different applications. Using this technology, designers can have CebaTech compile and off-load their ANSI C algorithms onto the hardware platform to produce a customized solution that meets their specific market needs.

The compiler technology’s high level of automation also enables the fast implementation of engineering change orders, even in the late stages of the design. OEMs can bring the right solution to market quickly, modify the trade-offs in response to changing end-customer requirements, and even cost-reduce it rapidly with a seamless ASIC-like conversion where product volumes and market timing make such a conversion viable.