| Richtek Adopts Incentia's DesignCraft and TimeCraft in its Mixed-Signal Design Flow | | |
April 15, 2011 -- Incentia Design Systems, Inc. today announced that Taiwan-based Richtek Technology Corp. has adopted Incentia's DesignCraft logic synthesis and TimeCraft static timing analysis software for its mixed-signal ASIC design flow.
"We have successfully adopted both DesignCraft and TimeCraft into our mixed-signal design tapeout flow," said KC Chang, Vice President of Richtek. "DesignCraft satisfied our requirements in reducing chip area and lowering power consumption. TimeCraft provided fast and accurate timing analysis capability. We were very impressed with the quality of results, fast run-time, and overall value of both tools, as well as Incentia's excellent technical support."
About Incentia's DesignCraft and TimeCraft
DesignCraft is a complete logic-synthesis tool to optimize for area, power, timing, and design-for-testability (DFT). It particularly aims for designs that demand aggressive reduction in chip area and power consumption.
TimeCraft is a full-chip, gate-level static timing and signal-integrity analyzer for nanometer timing analysis and sign-off. It has been known for its accuracy, fast runtime, and capability to handle extremely big designs. TimeCraft has been proven through numerous customer tape-outs, including those using advanced 40nm and below processes and complicated chips with more than 100 million gates.
Go to the Incentia Design Systems, Inc. website to find additional information.
| E-mail Incentia Design Systems, Inc. for more information.
| Keywords: ASICs, ASIC design, mixed signal design, mixed-signal design, EDA, EDA tools, electronic design automation, logic synthesis, timing analysis, timing optimization, timing closure, signal integrity, noise, Incentia Design Systems, DesignCraft, TimeCraft, Richtek Technology,
| | 600/33642 4/15/2011 589 79 | |
|
|
|
| | 0.71875 |
|
|
| | |
|
|
Subscribe to SOCcentral's SOC Explorer Newsletter and receive news, article, whitepaper, and product updates bi-weekly.
|
|
|
Exec Viewpoint
The Many Faces of Low-Power Verification
 Ghislain Kaiser CEO, Docea Power
|
|
Exec Viewpoint
Maximizing the Value of Your Internal IP
 Warren Savage CEO, IPextreme
|
|
|
|
Barbara's Bytes
So, Just What Is ESL
 Barbara Tuck Senior Editor, SOCcentral
|
|
|
|
|
|
|
|
| Design Center |
| Whitepapers & App Notes |
|
|
|
|
|
| Live and Archived Webcasts |
|
|
|
|
|
| Newsletters |
|
|
|
|
|
|
About SOCcentral.com
Sponsorship/Advertising Information
|
|
|