October 18, 2011 -- ARM and Cadence Design Systems, Inc. today announced the tape out of the industry's first 20-nm design based on the ARM Cortex-A15 MPCore processor. The test chip, targeting TSMC's 20-nm process, was jointly developed by engineers from ARM, Cadence and TSMC using a Cadence RTL-to-sign-off flow. Today's announcement is the result of an 18-month collaboration between ARM and Cadence on optimized design flows for the Cortex-A15 processor.

"The Cortex-A15 processor implementation targeting the TSMC 20-nm process pushed the envelope on all fronts and required engineers from ARM, Cadence and TSMC to work as a seamless team," said Chi-Ping Hsu, Senior Vice President, Research and Development, Silicon Realization Group at Cadence. "We have made significant 20-nm developments in the last three years in our Virtuoso and Encounter design and sign-off solutions for the world's most advanced processes. This important collaboration milestone enables Cortex-A15 processor-based designs at the most advanced process nodes. We intend to expand this collaborative model in working with ARM on the Cortex-A15 and other processor development."