February 2, 2012 -- Sonics, Inc. today announced that its advanced on-chip networks will support Tensilica, Inc.'s processor interface (PIF) to maximize customers' IP integration and SOC efficiencies. Sonics' on-chip networks can now connect to Tensilica's processor cores via Sonics' OCP-IP interface, which will further optimize on-chip performance, streamline IP integration and achieve new levels of efficiencies for its high-performance, dataplane processors in the home entertainment, networking, and mobile multimedia markets.
Sonics' high-performance interface to Tensilica's cores is ideally suited for a wide range of its on-chip networks, including SonicsSX, SonicsLX, SNAP, as well as the recently announced GHz SonicsGN, the industry's only GHz NoC (network-on-chip).
Tensilica's customizable dataplane processors (DPUs) are widely embraced in the audio, video, 4G LTE, and other major subsystems where time-critical data signal processing occurs. Tensilica's users have pioneered the use of multiple processors on chip to handle the many functions that must be offloaded from the main applications processor.
"By working with Sonics, we can provide our customers with an efficient on-chip network, which is particularly useful for cutting edge multicore chip designs," stated Steve Roddy, Vice President of Marketing and Business Development at Tensilica. "Our customers can now achieve superior system-level integration, reduced gate counts and even solve the most persistent network challenges inherent in the dataplane functions."
Go to the Sonics, Inc. website to find additional information.
