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 Category: News: News Archive 2012: Wednesday, May 22, 2013
Blue Pearl Joins Xilinx Alliance Program  
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May 29, 2012 -- Blue Pearl Software, Inc. has joined the Xilinx Alliance Program. As a result of its Xilinx collaboration, Blue Pearl announces improved productivity for Xilinx Vivado Design Suite users, by reducing development time, run time and the number of design iterations.

The Blue Pearl Software Suite accelerates the process of identifying timing-critical paths. It works with the recently announced Xilinx Vivado Design Suite and automatically generates SDCs that result in more-efficient synthesis runs and enables timing-driven place-and-route. "We have been working for more than six months with Xilinx to support its products and its new Vivado Design Suite," said Shakeel Jeeawoody, Vice President of Marketing at Blue Pearl. "We confirmed that the Blue Pearl Software Suite makes synthesis more efficient, accelerates implementation and improves timing for users of the Xilinx flow."

"We welcome Blue Pearl as a new member of our Xilinx Alliance Program," said Tom Feist, Senior Director of Design Methodology Marketing at Xilinx. "Xilinx has taken advantage of industry standards when developing the Vivado Design Suite to improve ease-of-use and expand our customer's ability to leverage solutions like those provided by Blue Pearl to improve productivity, accelerating their time-to-market and ability to gain a competitive advantage.”

About the Blue Pearl Software Suite

The Blue Pearl Software Suite accelerates FPGA implementation with comprehensive CDC checks and automatic SDC generation. Its Visualization Verification Environment and design technology give users immediate feedback for validating automatically generated pre-synthesis longest paths and SDCs, which are used to drive the efficiency of synthesis and place-and-route tools.



Go to the Blue Pearl Software, Inc. website to find additional information.

E-mail Blue Pearl Software, Inc. for more information.

Read more about
Blue Pearl Software, Inc.
on SOCcentral.com


Keywords: FPGAs, field programmable gate arrays, FPGA design, EDA, EDA tools, electronic design automation, Blue Pearl Software, Xilinx Alliance Program, RTL analysis, clock domain crossing, CDC,
601/38571 5/29/2012 315 44


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