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 Category: News: News Archive 2012: Sunday, April 19, 2015
Synopsys Design Implementation Tools Receive TSMC 20-nm Phase I Certification  
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May 31, 2012 -- Synopsys, Inc. today announced that TSMC has given Phase I Certification to Synopsys design implementation tools for its 20-nm process. TSMC certified the tools for its 20-nm design rule manuals (DRMs) and Spice models. Certified products include Synopsys IC Compiler for physical design; IC Validator for DRC and LVS; StarRC for extraction; and Galaxy Custom Designer for custom implementation. Certification of PrimeTime for static timing analysis is in progress. Certification covers all the relevant 20-nm technology files including routing rules, verification runsets, extraction rundecks and interoperable process design kit (iPDK).

Synopsys' Galaxy Implementation Platform features comprehensive support for TSMC's latest set of 20-nm design rules. TSMC has certified a full suite of Synopsys implementation tools, including:

  • IC Compiler - Innovative-patterning compliant placement, and correct-by-construction innovative-patterning-clean routing help provide the optimal area and performance that can be reliably decomposed during manufacturing
  • IC Validator - New, native graph-based coloring ensures layout decomposition and in-design integration with IC Compiler for accurate, scalable signoff of 20-nm designs
  • PrimeTime - Support for multi-valued SPEF model variation impact on timing due to innovative patterning
  • StarRC - Parasitic variation modeling solution addresses the effects of innovative patterning technology due to mask misalignment and other critical technology requirements
  • Custom Designer - Productivity aids, such as connectivity assisted editing, with support for new local interconnect and cut poly, 20-nm constraints, and correct-by-construction variable size via creation help manage design-rule complexity


Go to the Synopsys, Inc. website to find additional information.

E-mail Synopsys, Inc. for more information.

Read more about
Synopsys, Inc.
and
TSMC (Taiwan Semiconductor Manufacturing Company)
on SOCcentral.com


Keywords: ASICs, ASIC design, EDA, EDA tools, electronic design automation, Synopsys, Galaxy, IC Compiler, IC Validator, PrimeTime, StarRC, Custom Designer, TSMC (Taiwan Semiconductor Manufacturing Company)
601/38595 5/31/2012 488 72
Designer's Mall
0.453125



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