June 13, 2012 -- Intilop, Inc. today announced delivery of a full FPGA-based system platform powered by its new ultra-low-latency 4th Gen 10G Nano TCP Off-Load Engine (TOE) and ultra-low-latency media-access controller. It integrates the ultra-low-latency PHY available in Altera Stratix-V FPGAs. Full System Platform is on an Altera Stratix-V FPGA board from BittWare, Inc.

The mature, network-proven series of TOE's have been deployed in hundreds of networks worldwide including blue-chip companies, financial institutions and major world stock exchanges enabling trade executions in a record 1µs. The new platform is bound to break this record by yet another few hundred nanoseconds.

The FPGA platforms provide an "out of the box"" ready-to-use FPGA board where users can immediately start integrating/ running the ultra-low-latency full TCP off-load hardware with their application software or with their hardware applications.

This "hyper-accelerated" FPGA platform with all its integrated sub-system components pegs the latency from wire-to-user-FIFO at an unprecedented 230 ns.

This 76-ns TOE technology delivers performance at 20Gbps in full-duplex mode is 100X faster than legacy TCP/IP software.

Availability

The 4th Gen 10G Nano TCP Off-Load Engine (TOE) is available now.