Page loading . . .

  
 Category: News: News Archive 2012: Sunday, May 19, 2013
Synopsys Virtualizer Speeds Software Development for Systems Based on the Infineon AURIX Microcontrollers  
 Printer friendly
 E-Mail Item URL

June 26, 2012 -- Synopsys, Inc. today announced that Infineon Technologies AG has used Synopsys' Virtualizer tool set to deploy virtual prototypes of its AURIX microcontroller-based systems, enabling early software development prior to silicon availability. The AURIX virtual prototype, a fast, functional model of the multicore microcontrollers, is now an integral part of the suite of development tools provided by Infineon to accelerate the development and deployment of real-time embedded software.

"Virtual prototypes are an important tool for addressing the increasing software complexity in automotive electronic systems, and partnering with Synopsys ensures that Infineon and our customers will have access to market-leading virtual prototyping technology," said Axel Hahn, Senior Director of the Microcontroller Powertrain Application Line at Infineon Technologies. "Using Synopsys' Virtualizer to create the AURIX virtual prototypes, we were not only able to accelerate our internal software development, but also provide an early target for our customers to begin their system development activities and provide early feedback on our new architecture. With access to virtual prototypes as part of the AURIX development tool suite, our customers can now rapidly integrate this technology into their current software development and testing processes."

The new Infineon AURIX family features a multicore architecture with support for up to three independent 32-bit TriCore processor cores, providing a scalable set of performance options. The high performance and embedded-safety and security features of the AURIX microcontrollers enable them to be used for a wide range of software-rich automotive applications such as engine and transmission control, braking systems, power steering systems, chassis domain control, airbags and advanced driver-assistance systems.

Synopsys' Virtualizer was an enabling technology for Infineon, not only for the development of the microcontroller abstraction layer and the software tool chain for AURIX end users, but also to enable Infineon to engage customers early in their own product development cycles and receive valuable customer feedback. The Infineon-supplied AURIX virtual prototype enhances the software-debug and analysis capabilities available to software-development teams at automotive Tier 1 and OEM companies, accelerating product design and test cycles. AURIX virtual prototypes can also be used to create virtual Hardware-in-the-Loop (HIL) testbenches. Virtual HIL simulation enables system validation teams to increase the scope of their testing through fault injection and extended code coverage, thereby reducing development costs, accelerating time-to-market and increasing product reliability.

Availability

The virtual prototype for the AURIX multicore microcontroller is available immediately from Infineon. To deploy AURIX virtual prototypes, licenses for Virtualizer and the Infineon TLM Library are available immediately from Synopsys.

Posted by: John Miklosz

Go to the Synopsys, Inc. website to find additional information.

E-mail Synopsys, Inc. for more information.

Read more about
Synopsys, Inc.
and
Infineon Technologies AG
on SOCcentral.com


Keywords: ASICs, ASIC design, EDA, EDA tools, electronic design automation, virtual prototyping, Synopsys Virtualizer, Infineon Technologies, AURIX microcontrollers, MCUs,
601/38763 6/26/2012 327 52


Designer's Mall
0.375



 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Exec Viewpoint

Yes, Virginia,
There Is a
Stitch-and-Ship


Dave Johnson
VP of Sales
Breker Verification

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.601  0.4375