January 19, 2012 -- This article summarizes previous work about SystemVerilog UVM transaction recording, transaction modeling and the supporting transaction recording APIs. This discussion will span a wide spectrum, from simple concepts such as transaction begin and transaction end, to more advanced concepts such as relationships, "tags," and other transaction attributes.
The SystemVerilog UVM contains a transaction modeling abstraction, and has the ability to record this transaction model using a vendor specific API. This transaction model and vendor specific saved database is very powerful for debug, performance analysis and modeling for communication.
The UVM contains multiple layers of transaction modeling, including a transaction model in components, transactions and sequences. Furthermore, a uvm_recorder is the lowest level interface used for recording to the vendor specific database. In addition to the class-based modeling abstractions, the UVM provides macros (commonly known as the field-automation macros) to automate the recording of transaction attributes.
Unfortunately this layered transaction model is overly complicated, hard to understand, and confusing to use. It should be redesigned or at least re-architected. Due to the nature of the UVM development environment this kind of large development may either never occur, or may take a long time. So to be effective with transaction recording and modeling in the short to medium term, we will have to use the existing API, and learn to adapt to its limitations and quirks.
By Rich Edelman. (Edelman is with Mentor Graphics Corp.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the Design & Reuse website.
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