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 Category: Magazine & Journal Articles Online: Article Archive 2012: Friday, October 31, 2014
Design Calculations for Robust I2C Communications  
Publication: EE Times Memory Designline
Contributor: Microchip Technology, Inc.
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April 23, 2012 -- For many systems that require reliable non-volatile storage, EEPROM is the memory technology of choice. EEPROM features a robust architecture, with multiple suppliers and many years of refinement. EEPROM devices are available in a variety of industry-standard serial buses, including I2C, SPI, Microwire, and the UNI/O bus. Due to its widespread hardware support in microcontrollers and other chipsets, and the fact that its easy signaling enables efficient implementation with minimal silicon, the I2C bus comprises approximately 70% of the non-volatile memory market.

The I2C bus topology relies on correctly sized pull-up resistors for reliable, robust communications, however. Selecting the wrong resistor values can not only result in wasted power, but can also lead to erroneous bus conditions and transmission errors caused by noise or changes in temperature, operating voltages, and by manufacturing variations between devices.

 

By Chris Parris and Jonathan Dillon. (Parris and Dillon are senior applications engineers at Microchip Technology, Inc.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Memory Designline website.

Read more about
Microchip Technology, Inc.
on SOCcentral.com

Keywords: PCB design, embedded system design, embedded systems, I2C, computer system design, general-purpose computers, special-purpose computers, Microchip Technology, EE Times Memory Designline
602/38335 4/23/2012 494 84
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