June 11, 2012 --NOR Flash memory remains the preferred non-volatile technology for discrete memories in embedded systems. For some applications, NOR usage is migrating away from the parallel NOR bus to products based on the lower-pin-count serial peripheral interface (SPI) to optimize the memory subsystem. As system-level read throughput requirements continue to increase, a number of strategies have been deployed to optimize the SPI interface for higher performance. This article describes both system-level and memory-device strategies that have been deployed to allow higher SPI-read throughputs.
By Cliff Zitlaw. (Zitlaw is with Spansion, Inc.)
This brief introduction has been excerpted from the original copyrighted article.
