July 2, 2012 -- Debug represents a major cost to hardware development organizations and a constant source of frustration for engineers. According to a survey commissioned by Mentor Graphics in 2010, verification engineers spend an estimated 32% of their time debugging code. In a typical 8-hour day, that translates to more than 2.5 hours specifically dedicated to fixing defects.

Spending 2.5 hours debugging code can make for a frustrating day for an engineer, but what does that mean for the organization? According to the EE Times Global Salary and Opinion Survey from 2010, the annual compensation for a North American engineer, including bonuses and overtime pay, averaged $107,300. From that, it's easy to make a best-case, back-of-the-napkin estimate capturing the cost of employing a medium sized team of engineers to build a reasonably sized ASIC. The result is a very big number.

By Neil Johnson. (Johnson has been working in ASIC and FPGA development for more than 10 years. He currently holds the position of Principal Consultant at XtremeEDA Corp.)