Publication: Design & Reuse
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July 24, 2012 -- For voice processing it is important to ensure that the signal to be analyzed actually contains relevant information, especially if the system is operating in a real-time. This article presents an IP core speech detector for real-time systems, focusing on identification of segments of silence or voice, used in pre-processing of input signals to speaker recognition and verification systems. The IP core was designed to be able to be adapted to different environments of use and based on energy of samples to classify them as voice or silence.
By Elmar Melcher, Joseana Fechine, Adalberto Teixeira, Jorgeluis Guerra, and Karina Medeiros. (The authors are with the Center of Electrical Engineering and Informatics, Campina Grande, PB Brazil.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the Design & Reuse website.
| | Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, DSP, digital signal processing, digital signal processors, Design & Reuse,
| | 602/38970 7/24/2012 715 48 | |
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