May 15, 2006 -- IntellaSys Corp. formally unveiled its Scalable Embedded Array (SEA) Platform to launch multicore processor solutions for next-generation embedded applications. The performance-per-watt benefits of the platform are evident in the inaugural SEAforth product family, which was also formally introduced with its first entry, the SEAforth-24 chip solution. Packing 24 core processors, each of which can operate at one billion instructions per second, the SEAforth-24 chip dissipates only 150mW in a typical application.

"Our launch today represents a major milestone in embedded multicore processor design and the culmination of more than 200 man-years of work by some of the most innovative software and hardware developers in the semiconductor industry," said Chet Brown, President and CEO of IntellaSys. "Thanks to the algorithmic-configurable architecture embodied in our SEA Platform, our initial SEAforth family promises to enable a host of embedded wireless and portable applications."

Combining a 6x4 array of 18-bit processors with a powerful set of I/O functions, the SEAforth-24 chip deploys a dual-stack architecture that is both asynchronous and scalable. Capable of driving an antenna directly, the SEAforth-24 wireless solution eliminates the need for any external data converters.

Key Features:

With 24 cores operating independently on chip, designers can dedicate groups of them to handle specific tasks. For example, some could be assigned compute-intensive audio processing while others handle wireless/USB interfaces and drive external memory. Each core runs at the full native speed of the silicon instead of being throttled down to a slower external system clock frequency. At the same time, processors share the computing load by talking to each other to pass data, status signals, and even code blocks.

Each core automatically communicates with its nearest neighbors through dedicated registers. A core waiting for data from a neighbor goes to sleep to conserve power. Likewise, a core sending data to a neighbor not ready to receive also goes to sleep until that neighbor is ready. Even external signals on I/O pins wake up sleeping cores. By combining the automatic sleep mode with an asynchronous system architecture that eliminates an inefficient central clock, the SEAforth-24 chip operates at very low power. The VentureForth programming language

VentureForth is the native machine code for the SEA Platform chips. As a RISC version of the well established Forth software language created by IntellaSys CTO Chuck Moore more than three decades ago, VentureForth provides 32 powerful instructions including full 18x18-bit hardware-based multiplies with 36-bit results. This simple but elegant version of Forth features fast hardware-based multiply/accumulates and micro FOR/NEXT loops for reading, sending blocks of data.

Other features that relate to the way VentureForth runs on SEAforth chips include:

Forthlet Code objects that can be stored in one core but executed on others. Automatic "sleep mode" to save processor power while waiting to send/receive. RAM capacity for 2048 instructions; packing four instructions per 18-bit word. BIOS-facilitated message routing to assure efficient event coordination.

VentureForth programming frees designers from laboring over thousands of lines of assembly code. Moreover, it creates extremely compact code that is quick to write and debug. User code is stored in each core processor's RAM. At boot time, code is loaded into the chip and ripple-loaded into the appropriate core processor's RAM. It is VentureForth that enables the SEA Platform to be easily scalable. This permits the deployment of a sea of processors ranging from dozens to hundreds of cores all communicating efficiently and effectively with one another - whether cores reside on a single chip or multiple chips.

Development tools and Forthlet code library

Central to the IntellaSys development platform is the T18 compiler and simulator to facilitate the design of multicore solutions that fully leverage the performance-per-watt benefits of its SEA Platform. Debugging is accomplished by using the simulator to watch each core execute code, set breakpoints, and interact with neighboring cores. The T18 development tools run on Windows, Macintosh, and Linux based platforms. In addition, evaluation boards featuring four of the SEAforth-24 chips plus a variety of compatible peripherals are being offered.

Extending the power of VentureForth is the Forthlet Code Library. Unlike conventional code libraries that require linking the entire library into the applications program if just one routine is used, the Forthlet Library links only the routines used. In this system, there is no penalty for building a large, comprehensive library. Routines in the Forthlet Code Library take the form of Forthlet code objects that can be moved around the chip from core to core to do special processing. Forthlets are the basic building blocks of code on the SEA Platform. They are used in the ROM BIOS in each core, and in the library of pre-coded functions. Even the user written program takes the form of a large Forthlet code object that calls the others. To make the user's programming task easier, IntellaSys currently offers designers a library of approximately 100 Forthlet code objects.

Pricing and Availability