June 9, 2006 -- In recent months, a number of companies have moved away from the structured ASIC business. LSI Logic, Synplicity and Lightspeed have all announced that they will focus on more profitable and faster growing pieces of their business. Growth rate predictions are being whittled back for the market. But even as some companies are retreating, this structured ASIC market continues to grow. Where is this growth coming from and what can we learn from the recent structured ASIC failures?

The middle ground can be a horrible place to be. Cash strapped organizations continue to use FPGA's as long as they possibly can, avoiding the tooling and even modest NRE's of structured ASIC's. Non-cash strapped companies are focused on unit cost which leads them to standard-cell designs. Even though the vast majority of ASIC tape-outs would benefit from having at least some low cost, quick time to market configurability, few organizations have the resolve, or the bravado, to tell their customers and investors that the first chip will not work exactly right or that the specs will change before the chip goes into volume production.

The most notable retreat from the structured ASIC market was LSI Logic. LSI approached the structured ASIC business very much like other ASIC vendors had approached the gate array market in the early 90s. They used structured ASIC as a lower NRE alternative to standard-cell design. LSI's differentiation was powerful. It had a huge, high quality IP library and a massive sales and support organization. But this differentiation was not enough.

LSI is a large company and it needs a lot of sales to "move the needle." The customers for RapidChip were the same customers that LSI had for its standard-cell ASIC business. Word on the street was that LSI had put together a huge number of bases to make competitive bids for these customers. These large projects tended to be higher in volume and more part price sensitive than fit the sweet spot for structured ASIC's. While the success LSI experienced would have been great for a small company, there simply was not enough sales, wafer volume and profit for a large company like LSI. For other larger ASIC manufacturers, patience will be called for.

Using structured ASIC's simply as a way to get lower NRE ASIC's is not enough. Using configurable fabrics must bring additional benefits to the project. Structured ASIC's are finding success in projects that benefit most from the unique qualities of this configurability. Projects that need the fastest time to market are a natural for a structured ASIC; especially those that use standard-metal configurable fabrics, where design closure is simple and fast because of the prebuilt wiring, and where, after the final GDSII is generated, only a few final manufacturing steps are required.

Projects that are likely to be re-spun are another sweet spot for structured ASIC's as the benefits of mask costs and time to market are leveraged over multiple tape-outs. Niche markets with lower quantities of high performance parts are another natural market for structured ASIC's. FPGA's are simply too slow, burn too much power, or cost too much in volume for some applications. Many structured ASIC fabrics give designers the ability to use eBeam technologies or a small number of masks to quickly make very small quantities of high performance parts.

By looking at the projects where structured ASIC's best fit, we can then look at markets where structured ASIC's are most successful today. These are the markets that are generating the success stories and growth:

Platforms dedicated to FPGA conversions: We are seeing success in the structured ASIC market with companies using a specific structured ASIC as a platform for converting specific FPGA models. IP rights, matching IP specifications, test and packaging issues all make converting an FPGA design to a standard-cell ASIC notoriously tricky. Going from a set FPGA platform to a set structured ASIC platform allows reuse of the work done for subsequent platform-to-platform conversions. Both Altera and AMI, leading structured ASIC manufacturers, have built successful business around FPGA conversion. Structured ASIC platforms for specific low volume markets: We see structured ASIC success where FPGAs cannot get the job done; in markets where FPGAs use too much power, generate too much heat or don't have sufficient clock speeds. We also see structured ASIC platforms in specific areas such as mixed-signal and rad-hard markets where FPGA's will not work, but project volumes are not sufficiently high to justify a from-scratch ASIC Configurable SOC's for devices with short, changing market windows: Configurable SOC's are structured ASICs where the majority of the design may not be implemented in a configurable fabric. Tried and true sections of the chip are built with traditional standard-cell and full custom design methodologies. But new features, customizations for certain customers, or new spins required for emerging IEEE standards are implemented in the configurable area of the SOC. Sometimes the time required for design closure for standard-cell designs simply will not fit in the rapidly evolving consumer electronics markets. We see structured ASIC/Configurable SOC activity in microcontroller markets with configurable peripherals and accelerators, in the handheld market with changing features and CODEC specs, and in a number of standard parts markets such as automotive and printers where configurable SOC's are used to customize a design for a certain customer.

Unlike the traditional ASIC markets, these specific structured ASIC markets are successful and profitable today. There are some markets where the benefits of structured ASICs are a natural fit and as market windows continue to shrink for consumer driven features, look for the structured ASIC market to continue its healthy growth under the guise of configurable SOC's and platforms.

By Max Lloyd, CEO ViASIC