August 22, 2005 -- It was probably no surprise to anyone when the idea of reuse first started to appear in the development of chips. At first the industry turned to salvaging, or the reuse of blocks that were never intended to be reused. Later the ability to buy pre-designed blocks of functionality from third parties, which could be hooked together by the system designer, enabled huge chips to be put together in a fairly short amount of time.
New tools being introduced today make that even easier and quicker to manage. The Virtual Socket Interface Alliance (VSIA) was formed to help the industry tackle many of the technical, managerial and legal issues surrounding the silicon intellectual property (IP) industry, and its success has enabled the industry to grow faster than it would have been able to if there had been no unification in these areas.
But the IP market still has a bad name. Some still question the value of reuse, but in most cases the target of this criticism is wrongly placed. Designers creating IP blocks are not second rate engineers using bad methodologies or sloppy verification techniques. In fact, in some cases, they are using the most advanced and thorough techniques available. So what is the fundamental problem?
By Brian Bailey. (Bailey is an independent consultant helping companies improve their verification efficiency.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the eeDesign (EE Times EDA News) website.