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Cavium Networks Licenses Arteris FlexNoC Network on Chip Interconnect IP  
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July 12, 2011 -- Arteris SA today announced that it has entered into an agreement with Cavium Networks, Inc. to provide Arteris' FlexNoC network-on-chip interconnect fabric IP.

"Arteris' NoC interconnect technology is often called, 'a front-end solution to a back-end problem,' because using Arteris IP simplifies the front-end design process while easing back-end wire-routing congestion and timing-closure issues," said Farhad Mighani, Senior Director of ASIC Development at Cavium Networks.

"Cavium's purchase of Arteris' FlexNoC network-on-chip IP and memory scheduler products after a thorough technical evaluation demonstrates Arteris' capability to deliver the best-performing and most-scalable interconnect solution to SOC designers," said K. Charles Janac, President and CEO of Arteris.

Go to the Arteris SA website to find additional information.

E-mail Arteris SA for more information.

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Arteris SA
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Cavium, Inc.
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Keywords: ASICs, ASIC design, IP, intellectual property, cores, on-chip interconnect, network-on-chip, NoC, Arteris FlexNoC, Cavium Networks,
600/34247 7/12/2011 899 115
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