January 17, 2003 -- "Thanks to coupling capacitance between adjacent interconnect lines, crosstalk has become a significant limiting factor in achieving first silicon success. The number of silicon failures caused by unresolved crosstalk violations is rising dramatically as designers adopt nanometer process technology.
"Crosstalk can trigger both functionality errors due to glitch injection and delay errors due to signal timing deviation. Crosstalk creates voltage spikes (glitches) that can be significant enough to cause a downstream register to latch an incorrect logic state. These significant glitches are extremely elusive, and high accuracy in both glitch modeling and failure checking is vital to weeding out all potential violations. Failure to perform accurate crosstalk glitch analysis can lead to overlooked problems as well as additional design iterations to fix false alarms."
By Ken Tseng and Rahul Deokar. (Tseng is an architect for Signal Integrity solutions and Deokar is the Sr. Product Marketing Manager for Timing and Signal Integrity, at Cadence Design Systems, Inc.)
This brief introduction has been excerpted from the original copyrighted article.