July 15, 2005 -- Looking at today's digital ASIC and system-on-a-chip (SoC) designs, one could be forgiven for thinking that front-end design engineers and back-end layout designers would make great examples in the best-selling book, “Men Are From Mars; Women Are From Venus.” Front-end and back-end engineers “talk” different languages, perceive their worlds in different ways, and really seem to have very little in common.

Recently, however, these two camps have come much closer together. For example, design engineers now use layout-aware tools such as physically aware synthesis, and front-end tools increasingly take into account layout, design-for-test (DFT), and design-for-manufacture (DFM) considerations. However, a new divide is forming. Both design engineers and layout designers are huddled together on one side of a chasm, while the other side represents the unknown territory of proving a new IC process or technology node and extracting and documenting the design rules for that process or node.

By Tim Crandle. (Crandle is president of Stone Pillar Technologies, Inc.)