Avery’ s products automate the functional verification of ASIC/SOCs and systems. Avery’ s initial product, called VCK, is a new solution in functional verification automation that delivers greatly enhanced verification environment which automates test generation and functional coverage measurement and analysis. VCK is based on new high-performance simulation and coverage measurement engine, Verilog verification language extensions and powerful automated test generation capabilities, and robust dynamic debug facilities aimed at detecting hardware implementation specific bugs faster and earlier.

SOCcentral Feature Articles
Improving At-Speed DFT Coverage Using Early RTL Testability Analysis	9/20/2011

News
Avery Design Systems Announces eMMC and SD Verification IP Solutions	5/21/2013
Avery Design Systems Announces SCSI Express (SOP/PQI) Verification IP Solution	8/22/2012
Avery Design Systems Adds NVM Express to Storage Standards Verification IP Solutions	5/29/2012
Avery Design Systems Unveils DDR4 and DFI-PHY Verification IP Solution	3/27/2012
Avery Design Systems Unveils SimXACT for Elimination of X Pessimism Issues in Gate-Level Simulation	3/27/2012
Avery Design Systems Announces MIPI UniPro and UFS Verification Solution	1/13/2012
Northwest Logic and Avery Design SystemsTeam on PCI Express 3.0 Solutions	8/8/2011
Evatronix and Avery Partner for SuperSpeed USB 3.0 IP Development and Verification	2/28/2011
Avery Design Systems Enhances USB Solution for xHCI and UASP	1/24/2011
Avery Design Systems Performs RTL At-Speed DFT Testability Analysis	1/24/2011
Avery Design Systems Synthesizes Microarchitecture-Level Assertions and Coverage Properties	1/24/2011
Avery Design Enhances Insight for Reachability Analysis, Lower Power Verification, and RT-Level DFT Analysis	6/11/2010
Avery Design Systems Announces AMBA AXI and AHB Verification Solution	2/23/2010
Avery Design Systems Announces Support for PCI Express 3.0 Verification IP	7/13/2009
Avery Design Systems Announces USB 3.0 Verification Solution	2/11/2009
Avery Design Realizes Insight for Formal Bug Hunting and Coverage Closure	6/2/2008
Mentor Graphics and Avery Design Team to Deliver Comprehensive PCI Express and Serial ATA IP Solutions	11/5/2007
Avery Design Systems Announces Support for PCI Express IO Virtualization and AMBA AXI	5/23/2007
CAST Selects Avery Design Systems for PCI Express Verification IP	4/11/2007
Avery Design Delivers PCI Express Gen2 Verification IP and Compliance Test Suite	3/13/2007
Avery Design and ASIC Architect Team to Deliver Serial ATA (SATA) IP Solution	7/28/2006
Avery Design and ASIC Architect Team to Deliver PCI Express IP Solution	6/10/2005
Avery Design Systems Accelerates ATPG/BIST Pattern Validation	6/10/2005
Avery Design Systems Spins Up ATA Verification IP Family	6/10/2005
Attansic Selects Avery Design Systems for PCI Express Verification	6/15/2004
Tallika Selects Avery Design to Develop PCI Express Design IP Solution	6/15/2004
Avery Design Accelerates SDF-Based Gate-Level Simulation	6/9/2004
Avery Design and GDA Technologies Expand Partnership to Advanced Switching	6/9/2004
Avery Design and GDA Technologies Introduce MaxCov for PCI Express Compliance Verification	6/9/2004
Avery Design Systems Announces Support for Advanced Switching Technology	2/18/2004
NextIO Selects Avery Design Systems for PCI Express Verification	2/17/2004

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