Page loading . . .

  
 You are at: The item(s) you requested.Friday, September 10, 2010
Open SystemC Initiative Ensures Global Access of IEEE Std. 1666-2005 LRM at No Cost to Users   Featured
 Printer friendly
 E-Mail Item URL

July 18, 2006 -- The Open SystemC Initiative (OSCI) has announced the public availability of the IEEE 1666(TM)-2005 Standard SystemC Language Reference Manual (LRM) now accessible on the IEEE website. In addition, a companion open source proof-of-concept SystemC library developed by OSCI is now available for public review and comment on the OSCI website (www.systemc.org).

By making the IEEE 1666 LRM freely available worldwide, OSCI furthers its commitment to the rapid growth of a global community of system, semiconductor, intellectual property, embedded software and EDA companies. Beginning immediately, companies, universities, research institutions and individuals will be able to freely access the standard and develop applications for SystemC-based tools and technologies. The IEEE 1666 LRM will be available on an ongoing basis to download in a PDF format, at no cost to users and tool suppliers around the world.

"The opportunity to access the IEEE 1666 standard directly from the web will transcend geographic boundaries in educating people on the benefits of using SystemC for system design and verification," said Chuck Adams, Chair of the IEEE Standards Association Corporate Advisory Group at the IEEE. "By making IEEE 1666 publicly available, the potential user base and the next generation of tools have been greatly expanded, further cultivating a healthy environment built around the standard."

"OSCI's main objective is to provide a standard and support it for fostering innovation and a healthy ecosystem of commercial intellectual property, tools, silicon and systems," said Alain Clouard, chairman of OSCI. "To support this goal, we have continually provided valuable information and documentation at no cost to users as part of our open source distribution. The IEEE 1666 LRM surpasses our previous efforts in its quality and comprehensiveness. We are very satisfied and enthusiastic to make this well-defined SystemC standard available freely to the public."

An open source proof-of-concept version of SystemC library has been developed by OSCI which incorporates improvements made through the IEEE standardization process. Now open for public review and comment, the review process provides a key opportunity for individuals and companies to view implementations of the SystemC library first hand and gain invaluable insight into designing their various applications: semiconductors, models, engineering tools and more.

Go to the Open SystemC Initiative (OSCI) website to find additional information.
 Please click here to let us know if the above link is broken!

E-mail Open SystemC Initiative (OSCI) for more information.

Read more about
Open SystemC Initiative (OSCI)
on SOCcentral.com


Keywords: Open SystemC Initiative (OSCI), SystemC, EDA tools,
552/19710 7/21/2006 4271 597
Designer's Mall
0.359375



Copyright 2002 - 2004 Tech Pro Communications, P.O. Box 1801, Merrimack, NH 03054
 Search site for:
    Search Tips

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

Seeing Is Believing: How Visualization Simplifies IC DRC


Michael White
Senior Product Marketing Manager
Mentor Graphics Corp.

Tech Viewpoint

Verification Challenges
Require
Surgical Precision


Dr. Pranav Ashar
Chief Technical Officer
Real Intent, Inc.

Odd Parity

Summertime and the
Leavin’ Ain’t Easy


Mike Donlin
The Write Solution

Odd Parity Archive

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Design for Manufacturing
Design for Test
ESL Design
Floorplanning & Layout
Formal Verification
Logic & Physical Synthesis
Low-Power Design
On-Chip Interconnect
Reconfigurable Computing
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
.
Designer's Kiosk
Whitepapers & App Notes
Live and Archived Webcasts


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2010  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
1  0.421875