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Cadence Enhances Encounter RTL Compiler  
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December 19, 2006 -- Cadence Design Systems, Inc. has announced enhancements to the Cadence Encounter RTL Compiler solution with advanced global synthesis technology. The new Encounter RTL Compiler version 6.2 – available in L, XL, and GXL offerings – includes new global-focus algorithms that improve the quality of silicon (QoS) results including timing, power and area up to 10%, and reduces synthesis runtimes by as much as 50%.

Through hundreds of tapeouts, Encounter RTL Compiler global synthesis has proven to deliver improved performance, smaller die sizes, lower power consumption and faster design closure through place and route. Encounter RTL Compiler global synthesis offers multi-objective, multi-voltage capability for meeting frequency targets, minimizing area, and meeting power requirements early in the design stage.

"Data from our internal test cases and over 20 customer designs show that Encounter RTL Compiler with advanced global synthesis technology delivers timing and area improvements averaging 5% above earlier versions; power improvements averaging 10%; and run-time improvements averaging 30%, and as high as 50%," said Pradeep Fernandes, Vice President of Synthesis R&D at Cadence.

"Encounter RTL Compiler XL with advanced global synthesis technology was a vital part of our success in developing our Chesapeake network processor," said Tony Chiang, Senior Vice President of Bay Microsystems. "We were able to synthesize 1.5 million instance blocks top-down, which made our designers more productive and helped speed our time-to-market. And, the multi-objective synthesis of Encounter RTL Compiler helped us meet our aggressive frequency targets while minimizing area. The new 6.2 release provided area and power reductions of about 5%, and significant runtime reductions over our current release, so we look forward to taking advantage of these improvements."

"We use Encounter RTL Compiler global synthesis because it has the fastest turnaround times and produces the best netlist for physical implementation," said Eka Laiman, principal engineer at Magnum Semiconductor, a leading provider of ICs, software and platforms for recording and managing audio and video content. "With the 6.2 release we have seen a 50% runtime reduction, along with significant area and power reduction."

These new advanced global synthesis capabilities are available in the L, XL, and GXL configurations of the Encounter RTL Compiler segmented product.

Go to the Cadence Design Systems, Inc. website to find additional information.

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Keywords: Cadence Design Systems, Encounter RTL Compiler, synthesis, EDA tools,
552/21268 12/19/2006 4394 328
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