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Signal Integrity Approaches Meet the Multi-Gbps Design Challenge  
Publication: EE Times Planet Analog
Contributor: AWR Corp.
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March 25, 2007 -- The wireless explosion has spawned a frontier with countless market opportunities for communications companies. The increasing complexity of today's electronics products, however, has created a myriad of issues for designing and bringing to market these technology-rich applications. Electronic design automation (EDA) software is an important tool in the product generation process, and a key concern inherent in the design of next-generation, high-performance communications products is complex cross-domain signal integrity (SI) issues.

Signal integrity (SI) analysis has traditionally been used as a verification step prior to releasing a design for manufacturing. This methodology served the high-speed design community well as clock frequencies and data rates pushed through 100MHz and approached 1GHz. But with today's communications designs with data rates of 3 to 5Gbps and beyond, the fundamental assumptions that used to permit "fixing up" the timing at the end of the design cycle are no longer viable. High-speed data paths now lie on the critical path of product development and a new, more proactive approach to SI is needed.

By Dr. Mike Heimlich and Dr. Scott Wedge. (Heimlich is the microwave market segment director for Applied Wave Research, Inc. and Wedge is a senior staff engineer with Synopsys, Inc.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Planet Analog website.

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Keywords: EE Times Planet Analog, AWR, signal integrity, EDA tools,
579/22307 3/25/2007 7293 395


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