September 13, 2007 -- Platform verification boards typically have multiple FPGAs and hundreds of signals that are either terminated or non-terminated running between them. Checking the connectivity and locating fabrication and assembly faults becomes a must before the actual bitstream is loaded on the FPGAs for verification.
By Rajendra Turakani and Ritesh Ramesh Parekh. (Turakani is Senior Engineer and Parekh is lead engineer for multimedia systems at Ittiam Systems, Ltd.)
This brief introduction has been excerpted from the original copyrighted article.